Example questions

Question 1

What does HDL stand for?

Answer 1

Hardware description language

Question 2

What is a Field Programmable Gate Array?

Answer 2

This is an array of logic gates that can be manipulated to run a logical program.

Question 3

What does FPGA stand for?

Answer 3

Field Programmable Gate Array.

Question 4

The core component of an FPGA?

Answer 4

Configurable logic block.

Question 5

The four main components within the CLB?

Answer 5

and multiplexer

Question 6

What is the meaning of the term primitives in system Verilog?

Answer 6

All logic libraries have or can easily implement basic logic functions.

SystemVerilog implements a predefined set of logic functions, called primitives, that can be used instead of the library cells:

and(), nand(), or(), nor(), xor(), xnor(), not()

The output is always the first wire in the list

There can be as many inputs as required

Example: and U1(outputSignal, inputSignal1, inputSignal2); This makes designs more “portable” between technologies.

Question 7

What is the meaning of instantiation in SystemVerilog?

Answer 7

The are two types of instantiation commonly used:

Instantiation with positional port mapping:

Signals are connected to the instanciated lower level module in the same order as they were defined in the low-level module

FullAdder bit1(A1,B1,C1,S1,C2)

]Not good as it is easy for this to be incorrect

Instantiation with positional port mapping

The names of the ports of the lower-level subsystem are provided with the signals

they are being connected to.

FullAdder bit1 (.A(A1),.B(B1),.C(C1),.Sum(S1),.Carry(C2)); The port connections can be listed in any order

Question 8

What is the meaning of hierarchy in system verilog?

Answer 8

SystemVerilog allows us to include lower-level subsystems within a higher-level module to achieve the desired functionality.

This design approach, called hierarchy, is a good design practice that enables design partitioning.

Question 9

Implement the circuit

Answer 9

Question 10

What are the four values that the logic data type can take?

Answer 10

1,0,X,Z

Question 11

Suppose you have the following vectors in system Verilog?

input logic [5:0]A;

output logic [5:0]B;

//supose A = 010101

Set output B with the value of A shifted to the left by three positions.

Answer 11

assign B << 3

Question 12

Implement the digital system shown in the schetamtic below

Answer 12

assign F = (sel == 1) ? (B&C) : (A&C);

Question 13

Explain the function of the operator ‘≫’, using and example in SystemVerilog

Answer 13

This operator is used for shiting.

Give and example

a << 3

shifts a three to the left

Question 14

Give an example of continuous assignment using ‘assign’ in SystemVerilog

Answer 14

assign A = B+C;

Question 15

What are the benefits of ‘enum’ and ‘struct’ data types, and give an example of each data type using SystemVerilog code.

Answer 15

Struct can have different data types while enum, have to be all the same length and data type.

Question 16

Explain the use and benefit of parameter in the description and instantiation of a module?

Answer 16

Parameters can be used to scale a design

• The list #(parameter name=value …) is added into the module definition before the ports.
• The named parameters are used in for-loops etc. to scale the design.
• The default parameter value can be over-ridden in the instantiation.

Question 17

Explain the use of blocking (=) and non-blocking (<=) assignments using always_comb and always_ff blocks in SystemVerilog.

Answer 17

Blocking executes code in sequence, as the code is blocked together.

Non-blocking means that the code is executed in parrallel at the same time.

always_comb

Question 18

Describe the following diagram using two different approaches:

a. ‘if-else’ and a combinatorial block
b. ‘case’ and a combinatorial block

Answer 18

if sel = 1

out = in1

else

out = in0

always_comb

begin

case(Sel)

1: Out=in1;
2: Out=in0;

default

endcase

end

Question 19

Design a 4-bit Counter module using SystemVerilog. The counter should increment by 1 with the positive edge of the clock. The counter should set to 0 with the positive edge of the reset. Write down the complete SystemVerilog code.

Answer 19

module Counter()

(

input logic Clock,

input logic Reset,

output logic [3:0] Count

);

always_ff @(posedge Clock, posedge Reset)

begin

if(Reset)

Count <= ‘0;

else

Count = Count + 1

end

endmodule

Question 20

Design a N-bit Counter module using SystemVerilog. The counter should increment by 1 with the positive edge of the clock. The counter should set to 0 with the positive edge of the reset. Write down the complete SystemVerilog code.

N=4

Answer 20

module Counter()

(

input Reset

output [N-1:0] Count

);

begin

if(Reset)

assign Count <= ‘0;

elseif(Count <= 2^(N))

assign Count <= ‘0;

else

assign Count = Count + 1

end

endmodule

Question 21

Write the complete SystemVerilog code of a 4-bit ring counter. Use the following truth table as a guide.

Answer 21

module RingCounter

(

input logic Clock,

input logic Reset,

output logic [3:0] Count

);

always_ff @(posedge Clock, posedge Reset)

begin

if(Reset) Count <= 0’d1;

else Count <= {Count[2:0], Count[3]};

end

endmodule

Question 22

Describe using diagrams and text the architecture of the Ripple Carry Adder and Carry Lookahead Adder. Give an advantage and disadvantage of each adder.

Answer 22

A 4 bit ripple counter shown here, contains 4 Full adders, here the carry from each adder is fed into the next significant bit.

The advantage of this adder is that this a simple design that is cheap to construct and an easy to understand

An advantage of the ripple counter is that the more bits are added (example 32 bits) the slower the adder will get as the carry has to ripple down the line.

The Carry lookahead adder, contains circuitry that is represented by the C blocks in the diagram that is able to predict the carry status fro the forth comining adder. This operates by defining carry generate and carry propagation

1. Carry is generated if the adder produces a carry out independent of the carry in. A carry Ci is guaranteed if Ai and Bi are both 1 (Gi=Ai Bi).
2. Carry is generated if the adder produces a carry out whenever there is a carry in. A carry will be propagated if either Ai or Bi is 1.

An advantage to this design is that the adder can be extended indefinitely without the speed of the device is considerably affected.

Disadvantage, additional circuitry is required to operate the lookahead function.

Question 23

What is the decimal representation of the unsigned number 1101.101 ?

Answer 23

13.675

Question 24

What is the binary representation using two’s complement of -2.375?

Answer 24

1101.1010

Question 25

Add the numbers 0.75 + (-0.625) using two’s complement for the negative value. Write down all the steps needed for this operation.

Answer 25

0.125

Question 26

Write down the result from question 23 in the same format as the 8-bit register shown below.

Answer 26

1101.1010

Question 27

What are the benefits of floating point numbers?

Answer 27

• Floating point numbers are analogous to the scientific notion.
• They allow the representation of very small and very large numbers.
• Floating points in computers are defined by the IEEE 754 standard.

Question 28

Convert the number shown below to its normal scientific form.

102.4 x 10^-2

Answer 28

1.024

Question 29

Convert the number shown below to its normal scientific form

101.11

Answer 29

5.75

Question 30

Draw the block diagrams of von Neuman and Harvard architecture

Question 31

Give two advantages and two disadvantages of von Neuman and Harvard architecture

Answer 31

Von Neuman

Advantage: Fewer components needed then Harvard as there is just a single data bus.

Disadvantage: The Single bus mean data bottlenecks occur as there is only a singular pathway between the processor and meneory. Instructions and data storage are in the same place meaning errors can occur causesing the instructiojns to be over written.

Harvard.

Question 32

Explain the advantages of pipelined processors?

Answer 32

Latency - The amount of time required to process each instruction.

Pipelining does not increase the Latency. It can also sometimes be reduced.

Throughput - The Throughput of a processor is increased as the number of instructions per second will increase. This is because multiple an instruction is executed while another is being loaded in.

Question 33

Explain the dependancy hazard and its solutions in pipelined microprocessors

Answer 33

Some instructions may take longer to be executed than others. If this occurs then then the processor may need to wait. As a result, instruction are sometimes not carried out in order. But only if the instruction before it is not required. This leads to waiting due to data dep[endancy. Therefore in order to control the instruction flow, we need to know about the program flow to avoid these dependancy hazards.

Question 34

Describe the name and function of the three instructions in MIPS architecture?

Answer 34

I-Type - Immediate type instructions, These contain two Operands and one immediate value in the instruction

R-Type - Register type instructions, These contain three operands that correspond to registers

add R6, R10, R9

J-Type - These are jump type instructions. This instruction allows us to chnage the flow and sequanece of the program

Question 35

Suppose you have a microprocessor composed of 5 stages: fetch, decode and execute, memory and writeback. These stages have the following durations:

Calculate the latency and throughput for a non-pipelined and for a pipelined microprocessor.

Answer 35

Latency: 1500ps for both as this is not affected by pipelining.

Throughput: Non-pipeling: 1/1500x10^-12 = 6.67x10⁸

Pipelined 1/300x10^-12=3.33x10⁹ instrcutions per second

Question 36

Suppose you have a microprocessor composed of 5 stages: fetch, decode, execute, memory and writeback. These stages have the following durations:

Calculate the latency and throughput for a non-pipelined and four a microporcessor

Answer 36

N/A

Question 37

Give 2 characteristics of the RISC and CISC microprocessors

Answer 37

RISC:

• A small number of instructions, however over time this tends to increase.
• A large number of registers
• operations are performed between registers
• Simple instructions that execute quickly

CISC:

• Complex instructions set contain more and more complex instructions
• Instructions can operate several lower-level operations.

Question 38

What is the purpose of the Program Counter (PC) in a microprocessor?

Answer 38

The program counter points to the address where the next instruction needs to be fetched from.

Once the instruction is fetched the program counter is incremented by 1.

Question 39

What is the purpose of the Arithmetic Logic Unit (ALU) in a microprocessor?

Answer 39

The purpose of the ALU is to carry out arithmetic operations such as, addition, subtraction, multiplication and others

It also carries out logical operations such as and, or and nand

It will also output status flags which are used to show the result of the operation.

Question 40

Suppose you have a microprocessor with two levels of cache memory. Draw the complete memory hierarchy.

Answer 40

N/A

Question 41

Draw and explain the process of retrieving data from the memory hierarchy composed of registers, cache memory L1, cache memory L2, main memory and HDD.

Answer 41

N/A

Question 42

Explain what a bus is?

Answer 42

A bus in system verilog allows you to combine several binary signals together into one single unit or Bus. This allows all of the signals to be referred to by the same name.

Question 43

Explain what is meant by an enumerated variable?

Answer 43

An enumerated type (enum) allows the definition of a new variable data type composed by a set of named values.

This type of variables can make the code of your system much easier to read.​

Question 44

Describe the MAR?

Answer 44

The memory address register is a specially reserved register that will contain the address of the data that needs to be accessed.

When reading from memory data addressed by MAR is feed into the MDR and then used by the CPU. When writing to memory, the CPU writes data from the MDR to the memory location whose address is stored in the MAR.

Question 45

Describe the concept of data alignment?

Answer 45

In a microprocessor read and writes to memory are performed most efficiently when the data is naturally aligned, which means generally that the data address is a multiple of the data size. Data alignment refers to aligning elements according to there natural alignment.