9 Microprocessors program counter

Question 1

The basic design of a microprocessors is based on the following architectures

Answer 1

von Neumann architecture

Harvard architecture

Question 2

Von Neumann Structure?

Answer 2

Question 3

Advantages of Von Neumann?

Answer 3

• Single memory
• Data and instructions store in the same memory
• Single bus for data and instructions
• Memory and devices controlled by CPU

Question 4

Disadvantages of Von Neumann?

Answer 4

• One bus is a bottleneck
• Data and instructions can be overwritten by an error in the program

Question 5

Harvard architecture?

Answer 5

Question 6

Advantages of Harvard architecture?

Answer 6

• Two memories
• Data and instructions are stored in separate memories
• Two busses to access data and memory separately
• No conflict when using data and instructions

Question 7

Disadvantages of Harvard architecture?

Answer 7

• More complex control than von Neumann
• Production is more expensive (more busses and complex control)
• Free space in data memory can’t be used for instructions and vice versa

Question 8

What are stored program computers?

Answer 8

von Neumann and Harvard architectures are stored-program computers, where the program to be executed is stored in and access from the memory.

Earlier computers such as ENIAC employed the program-controlled model, where the programming process was based on connecting wires and configuring switches.

Question 9

The stored program concept?

Answer 9

The concept of stored-program computer was introduced by John von Neumann in 1947

Question 10

Main components of a computer?

Answer 10

Question 11

The main components of a bus?

Answer 11

Question 12

Example of a bus in system verilog?

Answer 12

Question 13

The main components of memory?

Answer 13

Question 14

Example of memory in system verilog?

Answer 14

Question 15

The main components of the CPU?

Answer 15

Question 16

A generic microprocessor overview?

Answer 16

Question 17

Advantages of the generic microprocessor layout?

Answer 17

Our generic CPU example uses a Harvard architecture to keep the data and program memory separate.

This means that we don’t have to manage the issue of the same bus handling everything.

Question 18

The stages of the fetch-execute cycle in practice?

Answer 18

• Get the instruction from memory
• Decode the instruction
• Decide what to do and do it (getting any data along the way)
• Deal with the resulting data
• Increment the program counter to get the location for the next instruction

Question 19

FEC: Stage 1?

Answer 19

Stage 1: The PC contains the address of the memory location that has the next instruction that has to be fetched.

Suppose the PC initialised to 0, then PC = 0.

Question 20

FEC Stage 2?

Answer 20

Stage 2: The address sent through the instruction bus is used to fetch the instruction from the program memory.

Question 21

FEC Stage 3?

Answer 21

Stage 3: Increment the program counter to fetch the next instruction.

This means that PC = PC + 1

Question 22

FEC Stage 4?

Answer 22

Question 23

The execute stage is dependant on the following?

Answer 23

It could be

• Get Data from memory
• Carry out an ALU function
• Store data in a register
• Store data in memory

Question 24

FEC: Stage 5?

Answer 24

Stage 5: Execute the instruction

Question 25

How does the program counter operate?

Answer 25