13 Addition and subtraction

Question 1

The most basic arithmetic operation is the sum of two binary bits:

Answer 1

Question 2

Adder TT

Answer 2

Question 3

Half adder logic circuit

Answer 3

Question 4

Adder circuit diagram

Answer 4

Question 5

Full adders overview?

Answer 5

Full adders allow the addition of n-bit binary numbers. The addition process is bit by bit, from the least significant bit to the most significant bit.

The addition at each position adds not only the respective bits, but also the possible carry bit from the addition at the previous position.

Question 6

input and outputs of a full adder

Answer 6

Thus, a full adder is a combinatorial arithmetic circuit composed of the input bits, variable A, B and Cin, and two output bits, S, Cout.

Question 7

Full adder TT and K Maps

Answer 7

Question 8

Full adder digital circuits

Answer 8

Question 9

x2 half adders running as a full adder

Answer 9

Question 10

Addition: Ripple Carry Adder

cascade architecture

Answer 10

• Multiple full adders can be in connected in a cascade architecture to build a n-bit binary adder.
• The output carry, Cout, from each full adder is connected to the input carry, Cin, of the next full adder in the chain.
• Addition of n-bit numbers requires a chain of n full adders or onehalf-adder and n-1 full adders.
• Also known as Ripple Carry Adder (RCA).

Question 11

Ripple Carry Adder (RCA) diagram

Answer 11

Question 12

Ripple Carry Adder (RCA). Consider the following two number: A=0101 and B=0111.

Answer 12

Question 13

Ripple Carry Adder, delays

Answer 13

In the Ripple Carry Adder (RCA) each full adder waits for the carry output from the previous full adder.

The output S2 from adder 2 cannot complete until carry C1 is provided by adder 1, output S3 from adder 3 cannot complete until carry C2 is provided by adder 2 and so on.

This creates a delay to compute the addition of two numbers. This delay can be considerable when implementing adders with large input sizes, e.g., 32 bit adder and 64 bit adder.

Question 14

Ripple Carry Adder The problems with the delay?

Answer 14

This creates a delay to compute the addition of two numbers. This delay can be considerable when implementing adders with large input sizes, e.g., 32 bit adder and 64 bit adder.

Then, depending on the number input bits, the adder can become slow.

Question 15

Addition: Carry Lookahead Adder

Answer 15

• The Carry Lookahead Adder (CLA) is a type of adder that overcomes the disadvantage from the RCA circuit.
• The CLA divides the adder into blocks providing circuitry to quickly determine the carry out of a block as soon as the carry in is known.
• This approach looks ahead across the block rather waiting the carry out to propagate through all the full adders.
• The CLA requires additional circuitry which increases the complexity of the design.

Question 16

Addition: Carry Lookahead Adder

carry generate, G, and carry propagate, P

Answer 16

The Carry Lookahead Adder uses a carry generate, G, and carry propagate, P, signals to determine the carry out.

1. Carry is generated if the adder produces a carry out independent of the carry in. A carry Ci is guaranteed if Ai and Bi are both 1 (Gi=Ai Bi).
2. Carry is generated if the adder produces a carry out whenever there is a carry in. A carry will be propagated if either Ai or Bi is 1.

Question 17

ADD: Carry Lookahead Adder logical circuit

Answer 17

Question 18

Addition: Carry Lookahead Adder, repeated carrys

Answer 18

Question 19

Circuitry of the carry look ahead generator for three full adders, C0 to C3

Answer 19

Question 20

Circuitry of the carry look ahead generator for three full adders, C0 to C3.

Overall realisation

Answer 20

Question 21

Subtraction overview

Answer 21

A subtraction can also be thought of as an addition of one value to the 2’s complement of another.

Adders can add positive and negative numbers using 2’s complement number representation.

The 2’s complement of a number can be obtained by taking the 1’s complement and adding 1 to the least significant pair of bits.

The 1’s complement can be implemented using inverters and a 1 can be added to the sum through the input carry.

Question 22

Answer 22

Question 23

The Adder-Subtractor

Answer 23

• The addition and subtraction functions can be combined into one circuit with one common binary adder.
• For this process, an additional input is required for control of the operation mode: addition/subtraction.
• An exclusive-OR gate can be used with each full adder to select the operation mode.
• This exclusive-OR gate also inverts all the bits of the input B for the subtraction operation mode, and initialise the carry of the first full adder to 0 or 1 for addition or subtraction, respectively.

Question 24

Adder-Subtractor circuit?

Answer 24

Question 25

Overflow?

Answer 25

When two numbers with n digits each are added and the sum is a number occupying n + 1 digits, we say that an overflow occurred.

Overflow is a problem because the number of bits that hold the number is finite and a result that contains n + 1 bits cannot be accommodated by an n -bit word.

When two unsigned numbers are added, an overflow is detected from the end carry out of the most significant position.

When two signed numbers are added the end carry does not indicate an overflow and additional circuitry is needed.

Question 26

Overflow example

Two signed binary numbers, +70 and +80, are stored in two eight-bit registers. The range of numbers that each register can accommodate is from binary +127 to binary -128. Since the sum of the two numbers is +150, it exceeds the capacity of an eight-bit register.

Answer 26

Question 27

Overflow detection?

Answer 27

Question 28

Verilog: Half adder?

Answer 28

Question 29

Verilog: Full adder?

Answer 29

Question 30

Ripple carry 4 bit adder System Verilog?

Answer 30

Question 31

Example of implementation of a full adder

Answer 31

Question 32

Example of implementation of a subtractor

Answer 32