CS401A's Midterms: Comp. Sys. Architect Module 03 Flashcards
For midterm exams.
Hardware Architecture
is the collection of physical parts of a computer system.
Computer hardware
Hardware Architecture
It can be categorized as having either external or internal components.
Computer hardware
Hardware Architecture
also called peripheral components, are those items that are often connected to the computer in order to control either its input or output.
These include the computer case and monitor (output component), and keyboard and mouse (common input components).
External components,
Hardware Architecture
include items such as the hard disk drive, motherboard, video card, and many others.
Internal components
Generation and Advancements
> 1st Generation
(Vacuum Tubes)
Hardware Architecture
was invented in parallel to the electric bulb and used a similar concept.
- The vacuum tubes
Generation and Advancements
> 2nd Generation
(Transistors)
Hardware Architecture
became faster, smaller, highly reliable, and significantly cheaper than vacuum tubes.
- Transistors
Generation and Advancements
> 3rd Generation
(Integrated Circuit)
Hardware Architecture
- Sometimes referred to as a “semiconductor chip,”
is a collection of transistors integrated and compacted into a single chip.
the integrated circuit
Generation and Advancements
> 4th Generation
(Microprocessors)
Hardware Architecture
- Computers in this generation were characterized by a significant increase in the number of transistors integrated into a single chip and by the invention of the
microprocessor.
Generation and Advancements
> 5th Generation
(Artificial Intelligence [AI])
Hardware Architecture
- VLSI technology in this generation became ULSI technology, resulting in the production of microprocessor chips having ten million electronic components.
(Artificial Intelligence [AI])
Hardware Architecture
- It is composed of integrated circuits that hold thousands of transistors responsible for processing the unique set of instructions and processes.
Microprocessor
Hardware Architecture
- It is designed to execute logical and computational tasks with typical operations such as arithmetic interprocess, device communication, input/output management, etc.
Microprocessor
Hardware Architecture
— It is responsible for accepting data from input devices, processing the data into information, and transferring the information to memory and output devices.
- Central Processing Unit (CPU)
Hardware Architecture
— As the name implies, its function is to perform arithmetic operations, such as addition, subtraction, division, and multiplication, and logic operations such as AND, OR, and NOT.
- Arithmetic Logic Unit (ALU)
Hardware Architecture
— Its function is to control the input and output devices, generate control signals to the other components of the computer such as read and write signals, and perform instruction execution.
- Control Unit (CU)
Hardware Architecture
— It is the fastest memory in a computer that holds information.
- Registers
Hardware Architecture
— This device is capable of storing information temporarily.
- Main Memory
Hardware Architecture
— It refers to a microchip that regulates the timing and speed of all computer functions.
- Clock
Hardware Architecture
— These are any hardware used to communicate with a computer.
- Input/Output Devices
Hardware Architecture
— These are physical devices, ports, or connections that interact with the computer or other hardware devices.
- Input/Output Interfaces
Hardware Architecture
— It is a feature of some computer bus architectures that allow data to be sent from a storage device to memory without using the CPU.
- Direct Memory Access
Hardware Architecture
— It is a pathway of data or instruction from one (1) element to the other.
- Bus
Hardware Architecture
— This bus is used to carry data to and from the memory.
a. Data Bus
Hardware Architecture
— This bus defines the number of addressable location in a memory IC.
b. Address Bus
Hardware Architecture
— This bus carries control signals from the control unit to the computer components in order to control the operation of each component.
c. Control Bus
Hardware Architecture
In computer architecture,
provides the fastest way for a CPU to access data.
a processor register
Hardware Architecture
- It holds a temporary value (IN BINARY) like data, instructions, memory addresses or I/O address, and special binary codes.
Registers
Hardware Architecture
- It can store, manipulate, and calculate values which vary from 16-bit, 32-bit, up to 64-bit registers sizes.
Registers
Hardware Architecture
— These store any transient data required by the processor.
- General-Purpose Registers / Accumulator
Hardware Architecture
— This holds the address of the current instruction being executed.
- Program Counter Register / Instruction Pointer
Hardware Architecture
— This holds the address of a memory location.
- Memory Address Register
Hardware Architecture
— This holds a data value that is being stored to or retrieved from the memory location currently addressed by the memory address register.
- Memory Data Register
Hardware Architecture
— These are used to allow the computer to keep track of special conditions such as arithmetic carry and overflow, power failure, and internal computer error.
- Status Registers / Flags
CPU Architecture
- It is a program consisting of code (instructions) and data.
Von Neumann Architecture
CPU Architecture
- It uses separate buses for instructions and data.
Harvard Architecture
Hardware Architecture
It allows communication between the hardware component and the software component of a computer.
Instruction Set Architecture
Hardware Architecture
— It is a computer where single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or can do multi-step operations or address modes within a single instructions.
Example: x86-x64 processors (Intel)
- Complex Instruction Set Computer
Hardware Architecture
— It is a computer which only uses simple instructions that can be divided into multiple instructions and perform low-level operations within a single clock cycle.
Example: x86-x64 processors (Intel)
- Reduced Instruction Set Computer
Instruction Set Architecture
- A large number of instructions.
- Multiple number cycles per instruction.
- Takes time to process instructions.
- Has greater energy consumption due to power-hungry components.
- Hardware-centric design.
- Efficient in RAM usage.
CISC
* Complex Instruction Set Computer
Instruction Set Architecture
- Requires few instructions.
- Single number of instruction per cycle.
- Can perform simple task quicker.
- Has low power consumption and it can go to sleep mode when not in use.
- Software-centric design.
- Heavy in RAM usage.
RISC
* Reduced Instruction Set Computer
Microprocessor Operations
— It is designed to fetch several instructions at a time in parallel.
- Fetch
Microprocessor Operations
— It identifies the opcode in which it determines the type of instruction.
- Decode
Microprocessor Operations
— It executes the part/s for each different instruction.
- Execute
Hardware Architecture
It is a method of simultaneously breaking up and running program tasks on multiple microprocessors, thereby reducing processing time.
Parallel Processing
Hardware Architecture
It is the process of accumulating and executing computer instructions and tasks from the processor via a logical pipeline.
Pipelining
Hardware Architecture
It allows storing, prioritizing, managing, and executing tasks and instruction in an orderly process.
Pipelining
