Microelectronics Flashcards

1
Q

How to implement Duality Principle

A

In a boolean Equation:

  1. ) change all 0’s to 1’s and change all 1’s to 0’s
  2. ) change all AND’s(⋅) to OR’s(+) and change all OR’s(+) to AND’s(⋅)

DO NOT CHANGE THE COMPEMENTED/NON-COMPLEMENTED VARIABLES (If its A, let it stay as A; if its B’, let it stay as B’)

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2
Q

Founder of Boolean Algebra

A

George Bool

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3
Q

(DEC) of fractional/decimal numbers into (HEX),(OCT),(BIN)

A
  1. ) Multiply (2 for BIN, 8 for OCT, 16 for HEX) to the Base 10 fractional number (use Base 10 multiplication)
  2. )the result of 1.) is A . B (A is the whole number, B is the Fractional)
  3. ) Append A next to the floating point (ex. 0.A)
  4. ) Repeat Step 1, but use B as the fractional number multiplied to 2, 8, or 16
  5. ) Result’s Whole number is appended next to the previous whole number
  6. ) Repeat until the fractional part becomes 0
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4
Q

The principle that governs how machines perform subtraction

A

N’s Complement (2’s Complement for binary)

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5
Q

Given a minuend and subtrahend, how is n’s complement subtraction performed?

A

Minuend + [N’s Complement of Subtrahend]

If sum overflows, discard overflowed digit, remainder is the difference (positive number)

If sum does not overflow, perform n’s complement on it, anfd append negative sign to get the difference (negative number)

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6
Q

The Inventor of the Hollerith Table

A

Herman Hollerith

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7
Q

Herman Hollerith made punch cards that used the Hollerith table for a company he organized called _________, that later became _________

A

Tabulating Machine Corporation (1896) becomes International Business Machines (IBM, 1924)

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8
Q

The Hollerith had ___ columns, and ___ rows

A

80 columns, 12 Rows

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9
Q

the 12 rows of the Hollerith table are composed of ___ Digit Rows and ___ Zone Rows

A

9 Digit Rows

3 Zone Rows

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10
Q

If a Numerical character was to be encoded into the hollerith table, the column that stores this character will have ___ punch/es in the ____ Row/s

A

1 punch in the Digit Row

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11
Q

If an Alphabetic character was to be encoded into the hollerith table, the column that stores this character will have ___ punch/es in the ____ Row/s

A

2 punches in Digit and Zone Row (1 each)

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12
Q

If a Special Character was to be encoded into the hollerith table, the column that stores this character will have ___ punch/es

A

1 or 2 or more punches

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13
Q

EBCDIC stands for ______

A

Extended Binary Coded Decimal Interchange Code

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14
Q

EBCIDIC is IBM Proprietary. What does that mean?

A

Only IBM Machines have the capability of using the EBCDIC Code

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15
Q

EBCDIC is in _____ Format, and is a/an ___ bit code

A

Binary Coded Decimal(BCD), 8 bit

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16
Q

ASCII stands for _____

A

American Standard Code for Information Interchange

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17
Q

ASCII uses __ bits to represent ___ Characters

A

7 bits to represent 128 characters

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18
Q

ASCII’s 128 Characters are composed of ___ Printable Characters and ___ Non-Printable Characters

A

94 Printable, 34 non-printable

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19
Q

Idempotent Law

A

X + X = X

X ⋅ X = X

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20
Q

Involution Law

A

(X’)’ = X

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21
Q

Complimentary Law

A

X + X’ = 1

X ⋅ X’ = 0

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22
Q

Commutative Law

A

X + Y = Y + X

X ⋅ Y = Y ⋅ X

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23
Q

Associative Law

A

(X + Y) + Z = X + (Y + Z)

X ⋅ Y) ⋅ Z = X ⋅ (Y ⋅ Z

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24
Q

Distributive Law

A

X(Y +Z) = X⋅Y + X⋅Z

X + Y ⋅ Z = (X + Y) ⋅ (X + Z)

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25
Q

Duality Operator

A

(X + Y + Z + …)ᴰ = X⋅Y⋅Z

(X⋅Y⋅Z)ᴰ = X + Y + Z

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26
Q

Simplification Theorem:

X⋅Y + X⋅Y’ = ?

A

X⋅Y + X⋅Y’ =

X

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27
Q

Simplification Theorem:

A⋅(A + B + C + … ) = ?

A

A⋅(A + B + C + … ) =

A

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28
Q

Simplification Theorem:

X + X⋅Y = ?

A

X + X⋅Y =

X

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29
Q

Simplification Theorem:

(X +Y’)⋅Y = ?

A

(X +Y’)⋅Y =

X⋅Y

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30
Q

Simplification Theorem:

(X + Y)⋅(X +Y’) = ?

A

(X + Y)⋅(X +Y’) =

X

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31
Q

Simplification Theorem:

X⋅(X +Y) = ?

A

X⋅(X +Y) =

X

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32
Q

Simplification Theorem:

X⋅Y’ + Y = ?

A

X⋅Y’ + Y =

X + Y

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33
Q

Multiplying out & Factoring:

(X +Y) ⋅ (X’ + Z) = ?

A

(X +Y) ⋅ (X’ + Z) =

X⋅Z + X’⋅Z

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34
Q

Multiplying out & Factoring:

X⋅Y + X’⋅Z = ?

A

X⋅Y + X’⋅Z =

X + Z) ⋅ (X’ + Y

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35
Q

Consensus Theorem:

X⋅Y + Y⋅Z + X’⋅Z = ?

A

X⋅Y + Y⋅Z + X’⋅Z =

X⋅Y + X’⋅Z

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36
Q

Consensus Theorem:

(X + Y) ⋅ (Y + Z) ⋅ (X’ + Z) = ?

A

(X + Y) ⋅ (Y + Z) ⋅ (X’ + Z) =

X + Y) ⋅ (X’ + Z

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37
Q

A product of ‘n’ Literals or Variables

A

Minterm

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38
Q

The Summation of minterms form a ____

A

Minterm Expansion
or
Sum of Products (SOP)

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39
Q

A boolean function can be expressed as the summation of its minterms or in SOP form:
F(x,y,z) = ∑m(1,2,3,…)

now, if F = 1, then _______ of the minterms are also equal to ___

A

at least one of the minterms are also equal to 1

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40
Q

A Summation of ‘n’ Literals or Variables

A

Maxterm

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41
Q

The Product of Maxterms form a ____

A

Maxterm Expansion
or
Product of Sums (POS)

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42
Q

A boolean function can be expressed as the product of its maxterms or in POS form:
F(x,y,z) = ∏M(1,2,3,…)

now, if F = 0, then _______ of the minterms are also equal to ___

A

at least one of the maxterms are also equal to 0

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43
Q

the Minterm or Maxterm of the first entry in a truth table always start with the subscript of ____

A

0

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44
Q

Minterm - Maxterm Conversions:

Mₙ = ?

A

Mₙ =

mₙ’

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45
Q

Minterm - Maxterm Conversions:

mₙ = ?

A

mₙ =

Mₙ’

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46
Q

given only 3 variables ( 2³ = 8, so terms involved are 0,1,2,3,4,5,6,7) Convert in terms of maxterms:

m₀ + m₁ + m₂ + m₃ = ?

A

m₁ + m₂ + m₃ + m₄ =

M₄M₅M₆M₇

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47
Q

given only 3 variables ( 2³ = 8, so terms involved are 0,1,2,3,4,5,6,7)

(m₀ + m₁ + m₂ + m₃)’ = ?

A

(m₀ + m₁ + m₂ + m₃)’ =

m₀’m₁’m₂’m₃’

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48
Q

given only 3 variables ( 2³ = 8, so terms involved are 0,1,2,3,4,5,6,7)

(M₄M₅M₆M₇)’ = ?

A

(M₄M₅M₆M₇)’ =

M₄’ + M₅’ + M₆’ + M₇’

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49
Q

A product/sum of inputs that are deemed impossible to occur, or the output of that specific set of inputs is not needed will produce a minterm/maxterm considered as
a ______

A

Dont Care Term

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50
Q

If an output is true, it has an output of ‘1’
If an output is false, it has an output of ‘0’
If an output is useless/impossibe/not needed/dont care, it has an output of ‘__’

A

X

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51
Q

Minterm Expansion Expression with Dont Care Terms

A

∑m(,,,…) + ∑d(,,,…)

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52
Q

Maxterm Expansion Expression with Dont Care Terms

A

∏M(,,,…) + ∏D(,,,…)

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53
Q

In a K-Map, any two adjacent squares have ___ variables in common

A

no variables in common

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54
Q

The code used that enables the K-Map to employ the non-common variables of any adjacent square

A

Grey Code

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55
Q

For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of one square represent/depend upon?

A

n variables (in the example, 4 variables)

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56
Q

For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of two adjacent squares represent/depend upon?

A

n-1 variables (in the example, 3 variables)

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57
Q

For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of 2^a adjacent squares represent/depend upon?

A

(n-a) variables

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58
Q

For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of n adjacent squares represent/depend upon?

A

none (whole K-Map is grouped, Value of the function, regardless of the input, is automatically 1)

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59
Q

When grouping 1’s (if minterm expansion is used), the number of squares allowed in a group must be ______

A

A Power of 2 (2^a, a is any integer)

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60
Q

A Group in a k-map which is not completely enveloped by a larger group, but its squares can be part of any other group

A

Prime Implicant

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61
Q

No matter how we group 1’s or 0’s in a k-map, this group will always have at least one square that uniquely belongs to this group alone

A

Essential Prime implicant

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62
Q

Assuming minterm expansions are used in a k-map, if some minterms, that represent one square each, has a value of 1, the square that that minterm represents is denoted with a _____

A

1

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63
Q

Assuming maxterm expansions are used in a k-map, if some maxterms, that represent one square each, has a value of 0, the square that that maxterm represents is denoted with a _____

A

0

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64
Q

Assuming either minterm or maxterm expansions are used in a k-map, if some minterms/maxterms, that represent one square each, is a dont care term, the square that that minterm/maxterm represents is denoted with a _____

A

X

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65
Q

In a K-map, are dont care terms(X) also included in the Grouping?

A

Yes

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66
Q

when Grouping in a k-map, is a group that only has dont care terms (X) valid?

A

no

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67
Q

The Logic gate that determines if the sum of the inputs is even or odd

A

Exclusive-OR Gate (XOR)

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68
Q

When The output of the XOR Gate is 0, the sum of its inputs is (even/odd)

A

even

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69
Q

When The output of the XOR Gate is 1, the sum of its inputs is (even/odd)

A

odd

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70
Q

The two universal gates (gates that can form any other gate using just themselves)

A

NAND and NOR

Any gate can be formed with only NAND gates, or only with NOR gates

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71
Q

Half-Adders / Full-Adders have two output bits; the ___ bit and the ___ bit

A

Sum and Carry

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72
Q

Given the inputs X and Y, What is the boolean expression for the Sum bit of a Half-Adder Circuit

A

S = X ⊕ Y

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73
Q

Given the inputs X and Y, What is the boolean expression for the Carry bit of a Half-Adder Circuit

A

C = X ⋅ Y

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74
Q

The inputs of a Half-Adder are called _____

A

Augend and Addend

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75
Q

A Full Adder Circuit has ___ inputs and ___ outputs

A

3 inputs, 2 outputs

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76
Q

A Full Adder consists of ______

A

Two Half Adders

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77
Q

When the inputs of the Full Adder Circuit are X, Y and Z, Z represents the ______

A

Carry from a lower significant position

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78
Q

Given the inputs X, Y and Z, What is the boolean expression for the Sum bit of a Full-Adder Circuit

A

S = (X ⊕ Y) ⊕ Z

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79
Q

Given the inputs X, Y and Z, What is the boolean expression for the Carry bit of a Full-Adder Circuit

A

C = (X⋅Y) + Z⋅(X ⊕ Y)

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80
Q

Full Adders can be cascaded into _______

A

Ripple Carry Adders

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81
Q

For a Ripple Carry adder with ‘n’ bits, the number of Full Adders needed is ______

A

‘n’ #Full adders

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82
Q

It is considered as the basic storage unit, and is the building block of a Flip-Flop

A

Latch

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83
Q

The Two Inputs of an SR-Latch are ____ and ____

A

Set and Reset

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84
Q

Truth Table of an SR Latch

A
S | R |    Remarks
---------------------
0 | 0  |     retain
0 | 1   |     reset
1  | 0  |       Set
1  |  1  |Undefined
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85
Q

When Both Set and Reset have a value of ‘1’, the situation is called _________

A

Race Condition (Circuit is confused, whether to set or reset, so it becomes a race to see which one of the two inputs become value ‘1’ first)

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86
Q

A D-Latch has ___ Input/s

A

only one

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87
Q

When input D in a D-latch is ‘1’, the output ____

A

Sets (1)

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88
Q

When input D in a D-latch is ‘0’, the output ____

A

Resets (0)

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89
Q

Latches are circuits (with/without) clocks

A

without clocks

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90
Q

Bistable circuits built from latches, and uses a clock

A

Flip-Flop

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91
Q

Flip-Flips have __ inputs and ___ outputs

A

2 Inputs (J and K), 2 outputs (Q and Q’)

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92
Q

When the Inputs of a JK Flip Flop are:
J = 0 , K = 0
the next state of the output (Q(t+1)) is ______

A

Q(t) (Retain previous state)

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93
Q

When the Inputs of a JK Flip Flop are:
J = 0 , K = 1
the next state of the output (Q(t+1)) is ______

A

0 (Reset)

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94
Q

When the Inputs of a JK Flip Flop are:
J = 1 , K = 0
the next state of the output (Q(t+1)) is ______

A

1 (Set)

95
Q

When the Inputs of a JK Flip Flop are:
J = 1 , K = 1
the next state of the output (Q(t+1)) is ______

A

Q(t)’ (Toggle: Next state is the complement of the previous state)

96
Q

A Flip-Flop that uses only one input to change the next state

A

T-FlipFop (T Stands for “toggle”)

97
Q

When the Input T of a T-Flip Flop is 0

the next state of the output (Q(t+1)) is ______

A

Q(t) (Retain previous state)

98
Q

When the Input T of a T-Flip Flop is 1

the next state of the output (Q(t+1)) is ______

A

Q(t)’ (Toggle: Next state is the complement of the previous state)

99
Q

A State Diagram that represents Present/Next States as Circles, and relates these circles with arrows that represent a specific combination of input and output in which if it occurs, present state(origin of arrow) shifts into the next state(destination of arrow)

A

Mealy model

100
Q

A State Diagram that represents a combination of Present/Next States AND Output states as Circles, and relates these circles with arrows that represent a specific input in which if it occurs, the present state(origin of arrow) shifts into the next state(destination of arrow)

A

Moore Model

101
Q

A technique used to simplify state diagrams, that can reduce the number of gates needed to produce the same output

A

State reduction

102
Q

A Series of D-Flip Flops that store a number of bits

A

Register

103
Q

Registers store/retrieve data either through _______ or ________ loading

A

Serial(Shift) or Parallel(Storage)

104
Q

These are registers that go through a prescribed sequence

A

Counters

105
Q

How are Ripple Counters Made?

A

Cascaded T-FlipFlops: output of one T-FlipFlop Serves as the clock of the next T-FlipFlop, the first T-FlipFlop requires a clock

106
Q

When a Microelectronics circuit is said to be Synchronous, what does that mean?

A

All Clocks are Centralized: All Clocks of different circuits have to be timed perfectly/Synchronized

107
Q

A Logic Family that uses Resistors

Also, state its default gate

A

Resistor-Transistor Logic (RTL)

NOR Gate

108
Q

A Logic Family that uses diodes to control Ib, and provides power
Also, state its default gate

A

Diode-Transistor Logic (DTL)

NAND Gate

109
Q

A Logic Family that has +25V as its level ‘1’ logic, and +5V as its level ‘0’ logic

A

High Level Diode-Transistor Logic (HDTL)

110
Q

A Logic Family that uses two or more transistors

Also, state its default gate

A

Transistor-Transistor Logic (TTL or T²L)

NAND gate

111
Q

A Logic Family that Has a Shottky Diode connected across transistors to speed up switching

A

Shottky Transistor-Transistor Logic (STTL)

112
Q

Considered the Fastest Logic Family, using complementary transistors(only one transistor is on at any given time) connected to a resistor

A

Emitter Coupled Logic (ECL)

113
Q

A Logic Family that uses both NPN and PNP, and is commonly used in Large Scale Integration (LSI)

A

Emitter Follower Logic (EFL)

114
Q

A Logic Family that improves Emitter Coupled Logic bu compressing it, and is commonly used in Large Scale Integration (LSI)

A

Emitter-Function Logic (EFL?)

115
Q

A Logic Family that has less power consumption and has a high output impedance

A

PMOS - CMOS Logic

P-Channel MOSFET

116
Q

A Logic Family that uses an N-channel Enhancement Type MOSFET

A

NMOS Logic

117
Q

A Logic Family that has lower power consumptopn, high impedance, and is faster than PMOS-CMOS Logic

A

NMOS Inverter Logic

118
Q

A Logic Family that uses both P-channel and N-channel MOSFETS

A

CMOS Logic

Complementary Metal Oxide Semiconductor FET

119
Q

A Logic Family that has lower power consumptopn, high impedance, and is faster than Both PMOS-CMOS Logic and NMOS Inverter Logic

A

CMOS Inverter Logic

120
Q

The 5 Computer Generations

A
1st - Electromechanical Calculators
2nd - Vacuum Tube Computers
3rd - Transistor Computers
4th - Integrated Circuit Computers
5th - VLSI Computers
121
Q

Computers Accdg. to size and cost

A
  1. ) PC
  2. ) Minicomputer
  3. ) Mainframe Computer
  4. ) Supercomputer
122
Q

ENIAC

A
  • “Electronic Numerical Integrator and Computer”
  • 1943, Mauchly & Eckert
  • 18,000 Vacuum Tubes
  • NOT a stored program Computer
123
Q

EDVAC

A
  • “Electronic Discrete Variable Automatic Computer”
  • 1944, Mauchly & Eckert
  • 1st Stored Program Computer
  • 4000 Vacuum Tubes (improved compared to ENIAC)
124
Q

EDSAC

A
  • “Electronic Delay Storage Automatic Calculator”
  • used one of the first assemblers, “Initial Orders”
  • inputs are paper tape, output displayed on a teleprinter
  • 3000 Vacuum Tubes
  • Used Mercury Delay Lines to store memory
125
Q

UNIVAC

A
  • “Universal Automatic Computer”
  • 1948
  • Based on EDVAC
  • 1st commerially available computer
126
Q

Components of a CPU

A
  1. ) Arithmetic Logic Unit (ALU)
  2. ) Accumulators
  3. ) Registers
  4. ) Stacks
  5. ) Control Unit
127
Q

CPU Component that executes commands and manipulates data

A

Arithmetic Logic Unit (ALU)

128
Q

CPU Component that holds data and instructions for further ALU Manipulation

A

Accumulator

129
Q

A Special Register that keeps track/points to the address of the next instruction

A

Program Counter

130
Q

A special register that holds the current instruction executed

A

Instruction Register

131
Q

Temporary Data Storages in Sequential Order

A

Stacks

132
Q

Stacks access/store data using this rule

A

Last in, First out (LIFO)

133
Q

Fetches and Decodes the Incoming Instructions and generates signals for ALU operation

A

Control Unit

134
Q

A Microprocessor’s components communicate through a _____

A

bus

135
Q

3 Types of Buses

A

Address Bus, Data Bus, and Control bus

136
Q

The rate of a microprocessor that describes the number of instructions per second

A

Clock Rate

137
Q

The rate of a microprocessor that describes the number of Floating Point Operations per second

A

Flops

138
Q

The rate of a microprocessor that describes how many millions of instructions per second are executed

A

Mips

139
Q

A Nibble has ___ bits

A

4 bits

140
Q

A Byte has ___ bits

A

8 bits

141
Q

a Half word has ___ bits

A

Up to 16 bits

142
Q

a Word has __ bits

A

up to 32 bits

143
Q

a double word has ___ bits

A

up to 64 bits

144
Q

memory size is always a multiple of _____

A

2

145
Q

Memory that contains text or graphics displayed on a screen of a terminal

A

Video Memory (VRAM)

146
Q

Memory that holds the most recently read and most frequently used data for faster retrieval

A

Cache Memory

147
Q

Memory that Contains the BIOS

A

Operating System Memory (OS Memory)

148
Q

memory that serves temporary high speed data

A

Scratchpad memory

149
Q

Four Semiconductor-Based memories

A

RAM, ROM, Programmable ROM(PROM), Eraseable PROM (EPROM)

150
Q

Programs usually stored in a ROM or EPROM since it is not frequently changed

A

Firmware

151
Q

RAM is a _____ Memory

A

Volatile

152
Q

ROM, PROM, and EPROM are ______ Memories

A

Non-Volatile

153
Q

Memory that requires no refreshing

A

Static Memory

154
Q

Memory that requires refreshing

A

Dynamic Memory (DRAM)

155
Q

rotating speed of hard/magnetic disk drives

A

4500-7200 RPM

156
Q

Data in a Hard Disk Drive can be organized on the disk in 3 ways:

A

Tracks, Sectors, and Cylinders

157
Q

____ is the term used when data is stored in concentric circles around the Hard Disk Drive

A

Tracks

158
Q

____ is the term used when data is stored in pie slice-shaped sectors around the Hard Disk Drive

A

Sectors

159
Q

____ is the term used when a specific data is stored as a numbered track on multiple Hard Disk Drives

A

Cylinder

160
Q

The Read/Write Permissions of an Optical Drive

A

WORM (Write once, Read Many)

161
Q

Two Types of Negative Numbers

A

Radix Minus One and True Complement

162
Q

Another term for (n-1)’s Complement (n refers to the base of the number being complemented)

A

Radix Minus One Complement

163
Q

Another term for (n)’s Complement (n refers to the base of the number being complemented)

A

True Complement

164
Q

Two types of codes

A
  • Weighted

- Unweighted

165
Q

Codes wherein the placement of the character in a line of code holds a specific weight, and their weighted sum represents the desired digit

A

Weighted Codes (ex. BCD and 2-4-2-1 Code)

166
Q

Codes with no weight assigned, regardless of position of a character in a line of code

A

Unweighted Code (ex. Excess-3)

167
Q

Three types of programming languages

A
  • Machine Language
  • Assembly Language
  • High Level Language
168
Q

A program that translates Assembly or High Level Languages into a Machine Language

A

Translator

169
Q

A program that specifically translates Assembly into a Machine Language

A

Assembler

170
Q

A program that specifically translates a High Level Language into a Machine Language

A

Compiler

171
Q

BASIC

A
  • “Beginner’s All Purpose Symbolic Instruction Code”

- Kemeny and Kurtz, mit 1960s

172
Q

Considered as the “Lingua Franca” or bridging language of microcomputers

A

BASIC

173
Q

COBOL

A
  • “Common Business Oriented Language”
  • English-Like Programming
  • divided into: Identification, Environment, Data, and Procedure
174
Q

FORTRAN

A
  • “Formula Translation”
  • First High Level Computer Language
  • John Backus
  • Compiled, Structured Language
175
Q

The High Level Language considered as the progenitor of high level concepts like variables, conditional statements, etc.

A

FORTRAN

176
Q

The High Level Language made by Nicolaus Wirth, Based on ALGOL, and Simplifies Syntax

A

PASCAL

177
Q

Programming language developed by the US Department of Defense, named after Ada Byron

A

ADA

178
Q

Programming language developed at Bell Labs, Standardized by ANSI, and is a structured programming language

A

C

179
Q

Predecessor of C

A

B

I Shit you not

180
Q

The developer of C

A

Dennis Ritchie

181
Q

A Low Level Language that allows Precise control over the microprocessor, and is faster compared to using a high level languange that have to use compilers

A

Assembly

182
Q

Who invented the Integrated Circuit?

A

Jack Kilby

183
Q

Where and when was the Integrated Circuit developed

A

Texas Instruments, 1958

184
Q

The Cofounder of Fairchild Semiconductor(1957) and Intel(1968)

A

Robert Noyce

185
Q

Robert Noyce is also dubbed as the “___________”

A

Mayor of Silicon Valley

186
Q

Three IC Classifications Accdg. to Nature of signal

A
  • Linear IC (Analog)
  • Digital IC (Uses logic gates)
  • Mixed IC (Digital and Analog)
187
Q

Three IC Classifications Accdg. to Physical Structure

A
  • Monolithic (Single Substrate)
  • Film IC (Uses only passive networks, either thick or thin film)
  • Hybrid IC (Combined Film and Monolithic)
188
Q

The Law that dictates the trend of the number of transistors in an integrated circuit, in which it doubles every two years

A

Moore’s law

189
Q

The Law that dictates the trend of the hard drive storage capacity increasing at a similar rate to Moore’s Law

A

Kryder’s Law

190
Q

The Law that dictates the trend of the amount of data transmitted through a Fiber Optic Cable, in which it doubles every 9 months

A

Butter’s Law of Photonics

191
Q

Also known as the “Pixels per dollar Law”, that predicts the price of digicams, LCDs and LEDs based on their resolutions

A

Hendy’s Law

192
Q

Also Known as the “Great Moore’s Law Compensator”, where software’s increasing processing power requirement increases in a way that offsets the performance gains predicted by Moore’s law

A

Wirth’s Law

193
Q

The Law that dictates the trend of a library that expands doubly every 16 years, and due to this, advocates the digitizing of printed books to save space

A

Rider’s Law

194
Q

An IC Integration scheme that has less than 12 gates per chip

A

Small Scale Integration (SSI)

195
Q

An IC Integration scheme that has 12-100 gates per chip, introduced in the late 1960s

A

Medium Scale Integration (MSI)

196
Q

An IC Integration scheme that has more than 100 gates per chip, introduced in the mid 1970s

A

Large Scale Integration (LSI)

197
Q

An IC Integration scheme that has more than 10,000 gates per chip, used from 1980s to present day

A

Very Large Scale Integration (VLSI)

198
Q

An IC Integration scheme that has more than 1,000,000 gates per chip

A

Ultra Large Scale Integration (ULSI)

199
Q

An IC Integration scheme that implements one whole silicon wafer as one “Superchip”

A

Wafer Scale Integration (WSI)

200
Q

5 IC Fabrication Steps

A
  1. ) Lithography
  2. ) Etching
  3. ) Deposition
  4. ) Oxidation
  5. ) Diffusion
201
Q

In the Lithography process, a thin viscous liquid layer called _______ is placed on the wafer

A

Photo-resist

202
Q

In the Lithography process, The Photo-resist hardens with baking, and is selectively removed by __________

A

Light Projection

203
Q

In the Lithography process, the Light projected on the photoresist comes from a recticle containing a _____, that contains the circuitry to be etched on the wafer

A

mask

204
Q

In the Etching process, the unwanted material is removed from the wafer surface, in which the _________’s pattern is transferred to the wafer by means of etching agents

A

Photoresist (From Lithography)

205
Q

The process of applying various materials on the wafer surface for polishing the surface

A

Deposition

206
Q

Two types of Deposition

A
  • Physical Vapor Deposition

- Chemical Vapor Deposition

207
Q

The process of creating a silicon dioxide layer on the wafer through the use of oxygen molecules

A

Oxidation

208
Q

Introduces dopant impurities into the semiconductor wafer, by accelerating Ions towards the wafer

A

Ion Implantation

209
Q

The process of annealing the bombardament-induced lattice defects on the wafer produced by Ion Implantation

A

Diffusion

210
Q

The Most Common Method of growing semiconductor crystals, discovered in 1916

A

Czochralski Method

211
Q

Steps involving Czochralski Method

A
  1. ) Melt Silicon (Silicon is MOLTEN HOT)
  2. ) dip rod with a seed crystal attached at the end
  3. ) rod is cooled, and is slowly retracted from the hot silicon melt
  4. ) silicon crystal forms on the seed crystal as rod is pulled
212
Q

In the Czochralski Method, The ________ the rod is pulled from the hot silicon melt, the greater the crystal quality

A

Slower

213
Q

IC Temperature range codes:

C

A

C - Commecial (0° to 70 °C)

214
Q

IC Temperature range codes:

I

A

I - Industrial (-25° to 85° C)

215
Q

IC Temperature range codes:

M

A

M - Military (-55° to 125° C)

216
Q

IC Packaging Codes:

D

A

D - Surface Mount Plastic DIL

217
Q

IC Packaging Codes:

J

A

J -Ceramic DIL

218
Q

IC Packaging Codes:

N or P

A

N or P - Plastic DIL, Sockets insertion

219
Q

The IC Family consisting of TTL Logic Gates

A

7400 Series

220
Q

The IC Family consisting of the 7400 series’ CMOS Counterparts

A

4000 Series

221
Q

World’s First Microprcessor

A

Intel 4004

222
Q

Some Notable Microprocessors

A
Intel 8080
IBM 8088
MOS Technology 6502
Zilog Z80
Motorola 6800 Series
223
Q

The Process of removing Photoresist by dissolving in Alkaline

A

Development

224
Q

Slices of Wafers are baked to diffuse concentrated impurity atoms into wafers (A doping process)

A

Diffusion Doping

225
Q

When Thin Single Crystal layers are grown on a substrate

A

Epitaxial Growth

226
Q

The process of connecting semiconductor devices together to form a circuit, by vapor deposition of aluminum

A

Metallization

227
Q

Process of sealing off the surface to avoid contamination

A

Passivation

228
Q

Material that is exposed to UV, and is developed prior to etching

A

Photoresist

229
Q

A piece of finely polished glass, ceramic, and oxidized silicon

A

Substrate

230
Q

Process of removing silicon crystal damage using an elevated temperature

A

Thermal Annealing

231
Q

A Film in which it’s thickness is at least 10 times greater than the mean free path of electrons (usually 10 μm)

A

Thick Film

232
Q

A Film in which only uses passive components (usually 1 μm)

A

Thin Film

233
Q

Because deposition of Aluminum is difficult with the presence of air, This Process was devised, using high temperature and low pressure

A

Vaccum Evaporation