Worksheet 52-Flips Flops and Counter

Question 1

What is the primary purpose of a flip-flop in electrical circuits?

Answer 1

A flip-flop is a synchronous bi-stable storage device that will store one bit as either a 1 HIGH or 0 LOW.

Question 2

Refer to the diagram. What type of flip flop is this?

Answer 2

The diagram shows an S-R Flip-Flop, which is a Set-Reset flip-flop.

Question 3

Refer to the diagram. What are the three inputs and two outputs for this device?

Answer 3

The inputs are a Set Connection, Reset Connection, clock input and two outputs that will be opposite from each other.

Question 4

Refer to the diagram: when a clock trigger is sent to this device, when does the device change its state?

Answer 4

Because this is a flip-flop, the trigger for a signal will happen at the time of downbeat or upbeat.

Question 5

Refer to the diagram, what is the output when both S and R are in the 1 or HIGH state?

Answer 5

Should the device receive an S and R at the same time, the device will be unstable and it might switch or might not.

Question 6

Refer to the diagram: What type of flip-flop is this?

Answer 6

This is a D-type Flip-Flop. This operates based on the input to D.

Question 7

Refer to the diagram: what sets the output Q to 0?

Answer 7

A low plated at D will set Q to 0.

Question 8

Refer to the diagram: what does Q with an overbar above it mean?

Answer 8

This is a “not Q” output that will always be the opposite of Q.

Question 9

Using these diagrams, complete the truth table.

Answer 9

Question 10

Using this truth table, complete the the time graph. Assume that Q is a 1 to start.

Answer 10

Question 11

What is this diagram?

Answer 11

Full Adder

Question 12

What is this diagram and why?

Answer 12

This is a half-adder because it does not have a carry-in input.

Question 13

Give a detailed description of this series of logic gates including their types, quantities, and how their respective inputs and outputs are connected together.

Answer 13

• The logic contains 2 XOR gates, 2 AND gates and 1 OR gate.
• Inputs A and B are connected to 1 XOR gate and 1 AND gate.
• The output of the first XOR is then connected to one of the inputs to the second XOR gate.
• The output of the first XOR is also connected to one lead of the second AND gate
• The carry-in is connected to the second input of the second XOR gate.
• The output of the second AND gate is sent to one of the inputs of the last OR gate.
• The other connection of the OR gate receives the output of the first AND gate.
• The output of the OR gate will be the carry-out for the next adder.

Question 14

Answer 14

B

Question 15

Answer 15

B

Question 16

Answer 16

A

Question 17

Answer 17

A

Question 18

Answer 18

C

Question 19

Answer 19

A

Question 20

Answer 20

A

Question 21

Answer 21

D

Question 22

Answer 22

B

Question 23

Answer 23

A

Question 24

Answer 24

C

Question 25

Answer 25

A SET, B SET

Question 26

Answer 26

LOW and QA, QB are HIGH

Question 27

Answer 27

flip-flop A changes from 1 to 0

Question 28

Answer 28

half adder for the A and B inputs

Question 29

Answer 29

half adder

Question 30

Answer 30

full adder

Question 31

Answer 31

Both HIGH

Question 32

Answer 32

Clock

Question 33

Answer 33

A RESET, B SET

Question 34

Answer 34

8

Question 35

Answer 35

16

Question 36

Answer 36

Sum = 1, CO = 1

Question 37

Answer 37

Sum = 0, CO = 1

Question 38

Answer 38

C

Question 39

Answer 39

B

Question 40

Answer 40

A