131 Week 14 - Branching Flashcards

1
Q

Pipelining

A

A way to exploit inherent parallelism inside the control unit to speed up the fetch-decode-execute cycle.

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2
Q

Program counter (PC)

A

A register which contains the address of the next instruction to be executed

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3
Q

Branch instructions

A

An instruction that manually changes PC to a different instruction than the next sequential instruction in memory.
Syntax:
branchOperator target
E.g.,
b target_label

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4
Q

Types of brancing

A

Conditional branch: perform a jump when a condition is true
Unconditional branching: always executes the target instruction

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5
Q

Label

A

Labels are symbols that represent addresses.
The address given by a label is calculated during assembly.
They can point to instructions or data.

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6
Q

Program-relative addressing

A

A reference to a label within the same section using PC +/- an offset.

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7
Q

Compare instruction

A

Compare instructions performs a comparison (substraction), updates the CPSR and discards the result.
Operator: cmp (CoMPare)
Syntax:
cmp destinationRegister, sourceRegister
E.g.,
cmp r1,r2

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8
Q

Conditional branching

A

Branch operations can also use the condition code in order to branch under certain conditions.
Conditional branching instructions depend on the CPSR’s condition bits (which are changed before the branch instruction via an arithmetic operation or compare instruction). If the relevant CPSR bit is true, branching will occur.

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9
Q

Conditional codes

A

There are conditional codes which can be added to the end of a branch instruction to create a conditional branch.
Syntax: b+code
E.g., beq means branch if equals
Conditional codes can be found here:
https://developer.arm.com/documentation/dui0379/e/arm-and-thumb-instructions/condition-codes

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10
Q

Conditional instructions

A

Any conditional code can be added to an instruction to make it conditional.
E.g., ADDEQ means add if equal.
MOVLT means move if less than.

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11
Q

If-then instructions

A

Thumb-2 introduced the If-Then (IT) instruction which allows for conditional execution for up to four consecutive instructions.
Instructions within an IT block must also specify the condition code to be applied.

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