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Processing (Fabrication) Flashcards

1
Q

Name two chemicals used as dopants for PMOS and NMOS, and what are they known as?

A
  1. PMOS: Boron (B) & Gallium (Ga), acceptors

2. NMOS: Arsenic (As) and Phosphorous (P), donors

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2
Q

What are two other names for Mask?

A

Reticle or Working Plate

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3
Q

What’s the difference between positive and negative photoresist?

A

Positive photoresist: developer will dissolve areas exposed to light, harden other areas
Negative photoresist: developer will harden areas exposed to light, and dissolve other areas.

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4
Q

What’s the technical term for the hardening of photoresist?

A

polymerize

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5
Q

What’s the “reverse field technique”?

A

Using negative photoresist

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6
Q

What’s oxidation?

A

Silicon combines with oxygen or steam at high temperature to form a layer of silicon dioxide (SiO2)

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7
Q

What’s chemical vapor deposition?

A

A silicon compound such as silane reacts with oxygen to produce silicon dioxide on the wafer surface. (For instance between M1 and M2)

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8
Q

What’s CVD stand for?

A

Chemical Vapor Deposition

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9
Q

What’s plasma deposition?

A

Atomic particles in the form of either vapors or ionic gases deposit on the wafer surface.

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10
Q

What’s another name for plasma deposition?

A

Sputtering

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11
Q

What’s doping?

A

A specific chemical is driven into the silicon with high energy and speed, usually at an elevated temperature.

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12
Q

What are two other names of doping?

A
  1. Ion-implantation

2. Diffusion

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13
Q

What’s annealing?

A

After doping, the wafer is reheated to about 600 degrees C, which repairs crystal structure damage and improves conductivity.

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14
Q

What extra effect does annealing cause?

A

The out-diffusion effect, or lateral diffusion effect.

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15
Q

What’s photolithography?

A

The step in which layer patterns are transferred from masks to the wafer surface by casting an image on the photoresist.

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16
Q

What’s “step and repeat”?

A

Photolithography creates multiple images at various locations over the entire wafer surface.

17
Q

What’s plasma etching?

A

Portions of oxide or other layers, such as poly, are selectively removed (etched) by either chemicals (etchants) or by high-energy electron beams.

18
Q

What’s CMP stand for?

A

Chemical Mechanical Polishing

19
Q

What’s chemical mechanical polishing?

A

A step which planarizes (smooths) the wafer surface. Done before lithography to provide a flat surface. Can also replace etching in certain situations, such as etching tungsten plugs (contact and via holes) or copper wiring.

20
Q

What’s the process sequence step #1?

A

Silicon wafer lightly doped with boron at the time of silicon ingot growth.

21
Q

What’s the process sequence step #2?

A

nwell creation:

  1. Add photoresist
  2. shine UV
  3. Add developer solution to remove some PR
  4. nwell formation through ion-implantation
  5. chemically remove remaining photoresist
  6. annealing
22
Q

What’s the process sequence step #3?

A

Field oxide creation:

  1. Add layer of nitride
  2. Add photoresist
  3. Shine UV
  4. Add developer solution
  5. Plasma etch the exposed nitride
  6. chemically remove remaining photoresist
  7. Form field oxide through “wet oxidation technique”. Classic “bird’s beak” shape. (nitride keeps oxide from forming in some places)
  8. Remove remaining nitride.
23
Q

What’s the process sequence step #4?

A

poly creation:

  1. gate (thin) oxide formation through (dry?) oxidation with carefully controlled oxide thickness (less than 100 angstroms) Doesn’t form on FOX
  2. poly formation through plasma deposition
  3. photoresist / UV / developer
  4. plasma etch poly and gate oxide
  5. remove remaining photoresist
24
Q

What’s the process sequence step #5?

A

P+ and N+ diffusion creation:

  1. photoresist / UV / developer
  2. P+ through ion-implantation
  3. remove remaining photoresist.
  4. photoresist / UV / developer (possibly same mask with inverse resist type)
  5. N+ through ion-implantation
  6. remove remaining photoresist.
25
Q

What’s the process sequence step #6?

A

1st CVD oxide

  1. create oxide layer through CVD process.
  2. photoresist / UV / developer
  3. etch oxide to form contact holes
  4. remove remaining PR.
  5. coat contact holes with titanium, plug with tungsten
  6. reflow step to smooth out rims of contact holes
26
Q

What’s the process sequence step #7?

A

Metal1 plasma deposition

  1. Deposit layer of metal
  2. photoresist / UV / developer
  3. plasma etch metal
  4. remove remaining PR.
  5. repeat CVD and metal for each metal layer
27
Q

What’s the final process sequence step?

A

Passivation layer

  1. Deposit passivation with plasma deposition
  2. photoresist / UV / developer
  3. plasma etch passivation
  4. remove remaining PR.
28
Q

What does TSMC stand for?

A

Taiwan Semiconductor Manufacturing Company

29
Q

What’s the difference between dry and wet oxidation?

A

Dry: very slow, very pure, gate oxide
Wet: faster, lower quality due to liberation of hydrogen, field oxide

30
Q

What is silane?

A

Silicon mixed with methane

31
Q

How thick is gate oxide, fox, and CVD oxide?

A

Gate: 200 A
Fox: 2-3um
CVD 1um

32
Q

What’s another name for CMP?

A

Planarization

33
Q

What’s electro-plating?

A

Put metal in liquid, apply voltage

34
Q

What’s the “contact spiking issue”, and the solution?

A

Silicon bleeds into aluminum. Add Si to Al to solve.

35
Q

What are the effects of “ultra-shallow” diffusions and nwells?

A

Less “out diffusion effect”, more resistance.

36
Q

What’s the “oxide encroachment effect”?

A

Affects edges of active area, affects W of transistors.

37
Q

What’s “field poly”?

A

Poly outside diff.

38
Q

What are two names for a place where chips are manufactured?

A
  1. Fab

2. Foundry

39
Q

What does RIE stand for?

A

Reactive Ion Etching. Alternative to chemical etching. Etching with high-enegry particles.

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