High Voltage (HV) Flashcards

1
Q

Name some circuits that often require higher voltages (12-15V).

A

E2PROM, FLASH, PLD, FPGA, some voltage regulators

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2
Q

What are two sources of the higher voltages?

A

A dedicated power pad from an off-chip source, or a “High Voltage Charge Pump” circuit.

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3
Q

What are five HV concerns and their solutions?

A
  1. Gate oxide rupture due to high electric field on poly. Solution: use thicker gate oxide, “Thick gate oxide MOSFETs”
  2. Nwell to diffusion shorts through an induced channel under the field oxide due to the HV on the poly. Solution: no direct poly connections with poly layer between PMOS and NMOS.
  3. HV avalanche junction breakdown (premature punch-through). Solution: create a graded junction for the HV source or drain. Double diffused drain (DDD) MOSFET (or DMOS structure).
  4. Device parametric shifts due to excessive channel length modulation due to high source to drain electric field. Even low voltage modern MOSFETs experience similar problem due to short channel length. Solution: DDD, employing LDD implant to create drift regions.
  5. Hot-carrier generation. Solution: no permanent solution. Hot-electron injection into gate oxide, modifying the Vt. Determines lifecycle, in years.
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4
Q

What does DDD stand for?

A

Double Diffused Drain

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5
Q

What is the “drift” region?

A

A region of LDD between the channel and the normal diffusion. Reduces lateral electric field intensity between source and drain.

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6
Q

What does “hot well” mean?

A

High voltage nwell

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7
Q

What’s an asymmetrical MOSFET?

A

Source and drain built to handle different voltages.

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8
Q

Name two ways to indicate thicker gate oxide in layout?

A
  1. Use special layer around active gate area.

2. In TSMC rules, OD1, OD2, OD3

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9
Q

What is a “native device”?

A

A “normally on” transistor. Vt ~= 0, apply negative voltage to turn off, has a negative bulk bias.

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10
Q

What happens when the lateral electric field is too strong?

A

Excessive channel length modulation.

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