Lecture 2 Flashcards
Logic Gates
Simple digital circuits that take one or more binary inputs and produce a binary output
Relationships between inputs and outputs described with:
Truth table
Boolean equation
Truth table
Lists inputs on the left and corresponding output on the right
Boolean equation
A mathematical expression using binary variables
NOT Gate
Output inverse of input
If A is FALSE, Y is TRUE
If A is TRUE, Y is False
Y equals not A
Line over A or A’
Buffer Gate
Copies input to output
If A is FALSE, Y is FALSE
If A is TRUE, Y is TRUE
Same as wire (logical PoV)
Able to deliver large current amounts to motor, able to quickly send its output to many gates, digital abstraction hides the real purpose of buffer (analog POV)
Triangle symbol (circle on output called a bubble, indicates inversion)
AND Gate
Two inputs, A and B
One output, Y
Produces a TRUE output only if both A and B are TRUE; otherwise output is FALSE
Intersection
Y equals A and B (Y=AB)
OR Gate
Two inputs, A and B
One output, Y
Produces a TRUE output if either A or B or both are TRUE; otherwise, output is FALSE
Y equals A or B (Y = A + B)
Union
XOR Gate
Exclusive OR
Two inputs, A and B
One output, Y
Produces a TRUE output if either A or B, but not both, are TRUE; otherwise, output is FALSE
Module-2 addition
Y = A^B
NAND Gate
NOT AND
Produces a TRUE output unless both inputs are TRUE; otherwise, output is FALSE
Y = ~(AB)
NOR Gate
NOT OR
Produces a TRUE output if neither input A nor B is TRUE; otherwise, output is FALSE
Y = ~(A+B)
XNOR Gate
NOT XOR
Produces a TRUE output if both inputs are FLASE or both are TRUE; otherwise FALSE
Multiple-input gates: AND
Produces a TRUE output when all N inputs are TRUE
Multiple-input gates: OR
Produces a TRUE output when at least one input is TRUE
Multiple-input gates: XOR
Called a parity gate
Produces TRUE if odd number of inputs are TRUE
DC Transfer Characteristics
Describe the output voltage as a function of the input voltage when the input is changed slowly enough that the output can keep up
Called “transfer characteristics” because they describe relationship between input and output voltage
Transfer Characteristics of NOT gate
Would have an abrupt switching threshold at Vdd/2
For V(A) < Vdd/2, V(Y) = 0 Vih = Vil = Vdd/2 Voh = Vdd Vol = 0
Real inverter changes more gradually between extremes
When V(A) = 0, output V(Y) = Vdd
When V(A) = Vdd, output V(Y) = 0
Transition between these endpoints is smooth and not exactly centered at Vdd/2
How to define the logic levels?
Where the slope of the transfer characteristic dV(Y)/dV(A) = -1
These two points are called the unity gain points
Choosing logic levels at unity gain points
Usually maximizes noise margins
If Vil were reduces, Voh would only increase by a small amount
If Vil were increased, Voh would drop precipitously
Static Discpline
Requires that, given logically valid inputs, every circuit element will produce logically valid outputs (to avoid inputs falling into the forbidden zone)
Digital designers sacrifice freedom of using arbitrary analog circuit elements in return for the simplicity and robustness of digital circuits
They raise the level of abstraction, and increase design productivity by hiding needless detail
All gates belong to a logic family obey the static discipline when used with other gates in the family
“Snap together like Legos” in that they use consistent power supply voltages and logic levels
Major logic families that predominated from 70’s to 90’s
TTL: transistor-transistor logic
CMOS: complementary metal-oxide-semiconductor logic
LVTTL: low-voltage TTL
LVCMOS: low-voltage CMOS
TTL
Vdd: 5(4.75-5.25) Vil: 0.8 Vih: 2.0 Vol: 0.4 Voh: 2.4
CMOS
Vdd: 5(4.5-6) Vil: 1.35 Vih: 3.15 Vol: 0.33 Voh: 3.84
LVTTL
Vdd: 3.3(3-3.6) Vil: 0.8 Vih: 2.0 Vol: 0.4 Voh: 2.4
LVCMOS
Vdd: 3(3-3.6) Vil: 0.9 Vih: 1.8 Vol: 0.36 Voh: 2.7
TTL: communication with other families
TTL: OK
CMOS: NO Voh < Vih
LVTTL: MAYBE
LVCMOS: MAYBE
CMOS: communication with other families
TTL: OK
CMOS: OK
LVTTL: MAYBE
LVCMOS: MAYBE
LVTTL: communication with other families
TTL: OK
CMOS: NO Voh < Vih
LVTTL: OK
LVCMOS: OK
TTL: communication with other families
TTL: OK
CMOS: NO Voh < Vih
LVTTL: OK
LVCMOS: OK
Transistors
Electrically controlled switches that turn ON or OFF when a voltage or current is applied at a control terminal
Modern computers use transistors because they are cheap, small, reliable
Types of transistors
Bipolar transistors
MOSFETs: metal-oxide semiconductor field effect transistors
MOSFETs
The building blocks of almost all digital systems
FET
Today, engineers can pack roughly 1 billion MOSFETS onto a 1cm2 chip of silicon
Costs<10 microcents
Capacity and cost improve by an order of magnitude every ~8 years
FET
Field-effect transistor
Creates an electric field that turns ON or OFF a connection between source and drain
Silicon
Used to build MOSFETs
Predominant atom in rock and sand
Group IV atom (4 valence e, forms bonds with 4 adjacent atoms, results in a cubic crystalline lattice)
By itself, a poor conductor b/c all electrons are tied up in covalent bonds (becomes a better conductor when small impurities called dopant atoms are carefully added)
Adding group V dopant to Si
As
Gives dopant atoms an extra electron uninvolved in bonds
Electron can easily move about the lattice
Carries negative charge, so n-type dopant
Adding a group III dopant to Si
B
Leaves a hole at neighboring silicon atom
Hole can migrate around the lattice
Lacks a negative charge, so it acts like a positively-charged particle - p-type dopant
Diode
The junction between p-type (anode) and n-type (cathode) silicon
Forward-biased diode
When voltage on anode rises above voltage on cathode
Current flows through the diode from the anode to the cathode
Reverse-biased diode
When the anode voltage is lower than the voltage on the cathode
No current flows
Capacitor
Two conductors separated by an insulator
When voltage V is applied to one conductor
- the conductor accumulates electric charge Q
- the other conductor accumulates -Q
Capacitance of a capacitor
The ratio of charge to voltage: C = Q/V
Proportional to size of the conductors
Inversely proportional to the distance between them
Important b/c charging or discharging a conductor takes time and energy (more capacitance means a circuit is slower and requires more energy to operate)
MOSFETs consists of:
A conducting layer (gate)
On top of an insulating layer of SiO2
On top of the silicon wafer (substrate)
Sandwich of several layers of conducting and insulating materials (built on thin flat wafers of silicon about 15-30cm in diameter)
nMOS
N-type transistors with regions of n-type dopants adjacent to gate called source and drain built on a p-type substrate
pMOS
Consisting of p-type source and drain regions in an n-type semiconductor substrate
nMOS Transistor Operation
Substrate of nMOS typically tied to GND, lowest voltage
nMOS Transistor Operation: gate at 0V
Diodes between source or drain and substrate are reverse-biased
No path for current to flow b/w source and drain, so transistor is OFF
nMOS Transistor Operation: gate at Vdd
Positive voltage applied to top plate of capacitor
Establishes electric field, attracts positive charge on top plate and negative charge on bottom plate
If voltage is sufficiently large, region inverts from p-type to become n-type
Inverted region - channel
Electrons flow from source to drain. Transistor is ON
pMOS operation
Substrate tied to Vdd
Gate at Vdd, transistor is OFF
When gate at GND, channel inverts to p-type and transistor ON
MOSFETs are not perfect switches
nMOS transistors pass 0’s well but pass 1’s poorly
When the gate of an nMOS transistor is at Vdd, the drain will only swing b/w 0 and Vdd-Vt
pMOS transistors pass 1’s well and pass 0’s poorly
To build both nMOS and pMOS transistors on the same chip
Start with p-type wafer, then implant n-type regions called wells
CMOS
Complementary MOS processes provide both types of transistors, and are used to build the majority of all transistors fabricated today
Gives 2 types of electrically controlled switches
CMOS operation
Voltage at gate (g) regulates flow of current between source (s) and drain (d)
nMOS transistors OFF when gate is 0, ON when gate is 1
pMOS transistors ON when gate is 0, OFF when gate is 1
CMOS NOT Gate
Triangle indicates GND
Flat bar indicates Vdd
N1 connected b/w GND and Y output
P1 connected Vdd and Y output
Both transistor gates controlled by the input A
If A = 0, N1 OFF and P1 ON. Y connected to Vdd but not to GND and is pulled up to a logic 1. P1 passes a good 1
If A=1, N1 ON and P1 OFF. Y pulled down to a logic 0. N1 passes a good 0
CMOS NAND Gate
Wires are always joined at 3-way junctions (only joined at a 4-way junction if a dot is shown)
N1 and N2 connected in series, both must be ON to pull output down to GND
P1 and P2 are in parallel, only one must be ON to pull output up to Vdd
A=1 and B=0:
- N1 ON but N2 OFF, blocking path from Y to GND
- P1 OFF but P2 ON, creating path from Vdd to Y
- Y pulled up to 1
Power consumption
The amount of energy used per unit time (battery life of portable systems limited by it)
Digital systems draw both dynamic and static power
Dynamic power
Used to charge capacitance as signals change b/w 0 and 1
Energy drawn from power supply to charge capacitance C to Vdd to CVdd^2
If voltage on capacitor switches at frequency f, it charges it f/2 times power second and discharges it at same rate. Discharging does not draw energy from the power supply
Static power
Used even when signals do not change and the system is idle
Total static current Idd (leakage current or quiescent supply current) b/w Vdd and GND
