Micro 5-7 Flashcards
1
Q
represents the fundamental building block of the central processing unit of a computer.
A
arithmetic logic unit (ALU)
2
Q
is a digital circuit used to perform arithmetic and logic operations.
A
arithmetic logic unit (ALU)
3
Q
is a small amount of storage available as part of a CPU
A
register
4
Q
tells the ALU what operation to perform on that data, and the ALU stores the result in an output register.
A
control unit
5
Q
this moves the data between these registers, the ALU, and memory.
A
control unit
6
Q
are used to manipulate binary numbers since there are only two possible states of a switch: open or closed.
A
Transistor switches
7
Q
An _______, through which there is no current, represents a 0.
A
open transistor
8
Q
A _____, through which there is a current, represents a 1.
A
closed transistor
9
Q
FPU
A
floating-point unit
10
Q
GPU
A
graphics processing units
11
Q
The inputs to an ALU are the data to be operated on, called
A
operands
12
Q
produces and conveys signals to external circuitry via its outputs.
A
arithmetic logic unit (ALU)
13
Q
They can be found at the heart of every digital computer and are one of the most important parts of a CPU (Central Processing Unit)
A
arithmetic unit or ALU
14
Q
It provide further information about the status of a result: if it is zero, if there is a carry out, or if an overflow has occurred.
A
a series of ‘flags’
15
Q
All information in a computer is stored and manipulated in the form of what?
A
binary numbers
16
Q
is a parallel bus that conveys to the ALU an operation selection code, which is an enumerated value that specifies the desired arithmetic or logic operation to be performed by the ALU.
A
opcode input
17
Q
determines the maximum number of different operations the ALU can perform; for example, a four-bit opcode can specify up to sixteen different ALU operations.
A
The opcode size (its bus width)
18
Q
however, contain ‘arithmetic units’ which are far more complex
than the one described above. These units may perform additional basic mathematical operations (multiply & divide) and bitwise operations (AND, OR, XOR et al). As such, they are commonly referred to as an ALU (Arithmetic Logic Unit).
A
Modern computational machines
19
Q
is the portion of a machine language instruction that specifies the operation to be performed.
A
opcode
20
Q
opcode
A
abbreviated from operation code, also known as instruction machine code, instruction code, instruction syllable, instruction parcel or opstring
21
Q
is an idealized or physical electronic device implementing a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output.
A
A logic gate
22
Q
is a component of a computer’s central processing unit (CPU) that directs the operation of the processor
A
The control unit (CU)
23
Q
It tells the computer’s memory, arithmetic and logic unit and input and output devices how to respond to the instructions that have been sent to the processor
A
The control unit (CU)
24
Q
It directs the flow of data between the CPU and the other devices.
A
The control unit (CU)
25
is typically an internal part of the CPU with its overall role and operation unchanged since its introduction.
The control unit (CU)
26
is the part of the computer’s central processing unit (CPU), which directs the operation of the processor.
The control unit (CU)
27
included the control unit as part of the von Neumann architecture.
John von Neumann
28
It fetches internal instructions of the programs from the main memory to the processor instruction register, and based on this register contents, the control unit generates a control signal that supervises the execution of these instructions.
The control unit (CU)
29
Examples of devices that require a CU are:
* Control Processing Units(CPUs)
* Graphics Processing Units(GPUs)
30
Types of Control Unit
Control units for low-powered computers
Hardwired control unit
Microprogram control unit
Multicycle Control Units
Pipelined control units
Out of Order Control Units
Translating control units
31
refers to a computational process that continually fetches instructions from a memory store, decodes them into operations and executes them to perform a calculation.
Fetch-Decode-Execute Cycle
32
The fetch-decode-execute process can be further explained by linking each cycle step (FETCH / DECODE / EXECUTE) with three hardware subsystems:
a memory unit, a control unit, and an arithmetic
unit.
33
A memory unit is the part of a computational machine that contains the machine instructions or data for performing general purpose calculations. This subsystem allows stored instructions or data to be accessed or fetched during a program’s execution.
FETCH (performed by a memory unit)
34
The control unit is responsible for automating and sequencing the fetch-decode-execute cycle – you can think of it as a system ‘conductor’. It also decodes instructions and makes sure the correct system operations are consequently performed.
DECODE (performed by a control unit)
35
An arithmetic unit is a hardware subsystem that performs arithmetic operations on binary inputs. The simplest arithmetic units execute binary addition and subtraction. More complex AUs can perform multiplication, division and logical bitwise operations. However, those more complex AUs are usually referred to as ALUs: 'Arithmetic Logic Unit'.
EXECUTE (performed by an arithmetic unit)
36
The simplest computers use a multicycle microarchitecture.
Multicycle Control Units
37
These were the earliest designs. They are still popular in the very smallest computers, such as the embedded systems that operate
machinery
Multicycle Control Units
38
These typically use both the rising and falling edges of their square-wave timing clock. They operate a step of their operation on each edge of the timing clock, so that a four-step
operation completes in two clock cycles.
Multicycle Control Units
39
This design has several stages. For example, it might have one stage for each step of the Von Neumann cycle.
Pipelined control units
40
These store the bits calculated by a stage so that the logic gates of the next stage can use the bits to do the next step.
Pipelined control units
41
It is common for even numbered stages to operate on one edge of the square-wave clock, while odd-numbered stages operate on the other edge.
Pipelined control units
42
When a program makes a decision, and switches to a different sequence of instructions, the pipeline sometimes must discard the data in process and restart.
Stall
43
When two instructions could interfere, sometimes the control unit must stop processing a later instruction until an earlier instruction completes. This can occur when two instructions operate on the same register.
pipeline bubble
44
A control unit can be designed to finish what it can. If several instructions can be completed at the same time, the control unit will arrange it. So, the fastest computers can process instructions in a sequence that can vary somewhat, depending on when the operands or instruction destinations become available.
Out of Order Control Units
45
When the execution of calculations is the slowest, instructions flow from memory into pieces of electronics called
issue units
46
holds an instruction until both its operands and an execution
unit are available.
issue unit
47
Some computers translate each single instruction into a sequence of simpler instructions. The advantage is that an out of order computer can be simpler in the bulk of its logic, while handling complex multi-step instructions.
Translating control units
48
____ of the control unit manages the translation of instructions. Operands are not translated.
"front"
49
The ___ of the CU is an out-of-order CPU that issues the micro-operations and operands to the execution units and data paths.
"back"
50
Many modern computers have controls that minimize power usage. In battery-powered computers, such as those in cell-phones, the advantage is longer battery life. In computers with utility power, the justification is to reduce the cost of power, cooling or noise.
Control units for low-powered computers
51
Most modern computers use
CMOS logic
52
CMOS wastes power in two common ways:
By changing state, i.e. "active power," and by unintended leakage.
53
This was invented to stop non-interrupt code so that interrupt code has reliable timing. However, designers soon noticed that a halt instruction was also a good time to turn off a CPU's clock completely, reducing the CPU's active power to zero.
"halt" instruction
54
are implemented through use of combinational logic units, featuring a finite number of gates that can generate specific results based on the instructions that were used to invoke those responses.
Hardwired control unit
55
The idea of microprogramming was introduced by
Maurice Wilkes in 1951
56
were organized as a sequence of microinstructions and stored in special control memory.
Microprograms
57
Outputs of the controller are organized in microinstructions and they can be easily replaced.
Microprogram control unit
58
subsequent instruction words are fetched into the instruction
register in a normal way. However, the operation code of each instruction is not directly decoded to enable immediate control signal generation but it comprises the initial address of a microprogram contained in the control store.
microprogrammed control units
59
____was a Hungarian mathematician who made important contributions to mathematics, physics, computer science, and the area of artificial life. He was born in ____
John von Neumann
Budapest, Hungary, on 28 December 1903.
60
this accelerates applications running on the CPU by offloading some of the compute-intensive and time consuming portions of the code.
GPU
61
is a temporary storage area built into a CPU
register
62
Internal registers include the?
instruction register (IR), memory buffer register (MBR), memory data register (MDR), and memory address register (MAR)
63
fetches instructions from the program counter (PC) and holds each instruction as it is executed by the processor.
instruction register
64
basically a storage space for units of memory that are used to transfer data for immediate use by the CPU (Central Processing Unit) for data processing.
register
65
Types of registers include
memory address register, memory buffer register, input output address register, input output buffer register, and shift register
66
Functions of a Register
1) Fetching: The registers fetch data instructions that are keyed in by the user and locate the potentially stored data from the system.
2) Decoding: This ability is used for interpreting the set of instructions means and process them according to desired results by the user. This function is a very crucial one because some information has to be fully processed to achieve a desired goal or results.
3) Execution: Many computer related tasks are processed by the registers, stored into the computer memory, and given out as per the commands keyed in by the user. Information is processed according to the needs of the user.
67
This register holds the address of memory where CPU wants to read or write data
Memory Address Register (MAR)
68
holds the address of a memory block in which read or write.
holds the memory location of data that needs to be accessed.
Memory Address Register (MAR)
69
When reading from memory, data addressed by MAR is fed into the ____ and then used by the CPU
MDR (memory data register)
70
is a parallel load register that contains the next memory address to be manipulated.
Memory Address Register (MAR)
71
This register holds the contents of data or instruction read from, or written in memory.
Memory Buffer Register (MBR)
72
The contents of instruction placed in this register are transferred to the Instruction Register, while the contents
of data are transferred to the accumulator or I/O register.
Memory Buffer Register (MBR)
73
this register is used to store data/instruction coming from the
memory or going to the memory.
Memory Buffer Register (MBR)
74
is used to specify the address of a particular I/O device
I/O Address Register (I/O AR)
75
has the ability to compose smaller units, such as bytes or characters, into units of machine-word size, or to perform the reverse decomposition.
I/O register
76
is used for exchanging data between the I/O module and the processor.
I/O Buffer Register (I/O BR)
77
is also known as Instruction Pointer Register.
Program Counter register (PC)
78
This register is used to store the address of the next instruction to be fetched for execution.
Program Counter register (PC)
79
is a register in a computer processor that contains the address (location) of the instruction being executed at the current time.
program counter
80
is a specific set of ordered operations for a computer to perform
program
81
is an order given to a computer processor by a program
instruction
82
is a specific location in memory or storage
address
83
is one of a small set of data holding places that the processor uses.
register
84
Once an instruction is fetched from main memory, it is stored in the
Instruction Register
85
holds a machine instruction that is currently being executed.
Instruction Register
86
this sits at the top of the memory hierarchy.
Register
87
the function of the ______ is to hold that currently queued instruction for use.
Instruction Register
88
This register holds the initial data to be operated upon, the intermediate results, and the final result of operation. The final result is transferred to main memory through MBR.
Accumulator Register
89
is located inside the ALU, It is used during arithmetic & logical operations of ALU.
Accumulator Register
90
this represents a set of memory blocks; the data is stored in and retrieved from these blocks in an order, i.e. First In and Last Out (FILO).
stack
91
is used to manage the stacks in memory. The size of this register is 2 or 4 bytes.
Stack Control Register
92
is a computer central processor register whose purpose is to keep track of a call stack.
stack register
93
is used to indicate occurrence of a certain condition during an operation of the CPU. It is a special purpose register with size one byte or two bytes.
Flag register
94
Each bit of the flag register constitutes _____, such that the bit value indicates if a specified condition was encountered
while executing an instruction.
a flag (or alarm)
95
is used to store the data that will be stored or will be fetched from the computer memory I.e. Random access Memory (RAM).
MDR (Memory Data Register)
96
this act as a buffer as it can store anything that can be copied from the computer memory and can be used by the processor for further operations.
MDR (Memory Data Register)
97
this stores the data before the data is transferred to the decoder.
MDR (Memory Data Register)
98
this store the data and information that can be shifted to other memory components of the system or vice versa.
MDR (Memory Data Register)
99
are a type of computer memory used to quickly accept, store, and transfer data and instructions that are being used immediately by the CPU.
Registers
100
The registers used by the CPU are often termed as
Processor registers
101
this may hold an instruction, a storage address, or any data (such as bit sequence or individual characters).
Processor register
102
is a type of processor register in the central processing unit (CPU) that is widely used for altering the address of operand at the time of program execution. This is widely used for doing array or vector operations.
index registers
103
It stores data values fetched from main memory in the accumulator for arithmetic or logical operation.
Control Unit
104
It transfers data from external devices to processor and memory, and vice versa. It contains internal buffers for temporarily holding this data until it can be sent on.
I/O module
