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CS 6291 Embedded Software > Lesson 5--Registers and Memory > Flashcards

Lesson 5--Registers and Memory Flashcards

1
Q

Registers

A

Architecturally visible containers other than memory

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2
Q

Register files

A

a homogeneous register set

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3
Q

Cluster

A

A group of register files and functional units interconnected with an interconnection network.

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4
Q

VLIW communication

A

Most communication will be within the cluster.
Less communication inter-cluster.
Very little memory communication.

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5
Q

Two Types of Clustering

A

Architecturally Invisible

Architecturally Visible

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6
Q

Architecturally Invisible Clustering

A
  • -Appears as one large register file to the compiler.
  • -Hardware needs to copy between register files.
  • -Detecting when copies of data are needed is hard.
  • -All registers need to be exposed in one operand field.
  • -Hardware stalls due to copying between registers
  • -NOT scalable
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7
Q

Architecturally Visible Clustering

A
  • -ISA must include a way to specify operations assigned each cluster
  • -The copies between clusters are implicit copy or explicit copy
  • -Directly copy registers to registers in a different cluster
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8
Q

Explain an implicit copy in architecturally visible register clusters

A

Operations may r/w operands in non-local registers. Complicated for scheduling and scalability issues

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9
Q

Explain an explicit copy in register clusters

A

Only a special operation can access a remote register under compiler control and must be inserted in a special place in the code.
May increase instruction issue pressure and code size

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10
Q

Indexed register files

A

Go to a specific register in a file (base + offset)

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11
Q

Rotating register files

A

Rotate files using a round robin technique.

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12
Q

Frame

A

Area where the inputs, outputs and variables of a function call reside

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13
Q

Advantage of allocating the frame in a register file?

A

Eliminates register spills and restores at call boundaries

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14
Q

Register spill

A

When a function is called, all of the variables in the register file must be stored in memory before the new variables can be loaded into the file.

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15
Q

Restore

A

When the function is called again, the variables have to be called from memory and restored to the register file

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16
Q

True

A

True or False: Registers and memories are the most important part of computer architecture, especially for RISC processors.

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17
Q

RISC

A

Registers and memories are the most important part of computer architecture, especially for
CISC or RISC processors.

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18
Q

RISC

A

CISC or RISC: processors require all data be in registers before execution of instructions.

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19
Q

True

A

True or False: In VLIW there is no bypassing

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20
Q

VLIW

A

VLIW or RISC: There are specific instructions for moving data from register to register, this gives more flexibility to the programmer, but it means there can be no bypassing.

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21
Q

VLIW

A

When it comes to Clustering, there is a lot of pressure on register files in RISC or VLIW.

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22
Q

Groups

A

When it comes to Clustering, to reduce the pressure, the register files and functional units are clustered into _____?

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23
Q

interconnection

A

When it comes to Clustering, they are connected with an interconnection or intraconnection network.

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24
Q

True

A

True or False: there are multiple commands to the register files, so each must be able to act independently with functional units.

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25
Q

Scalability

A

There were large multiported register files, but scalability or unscalability was hindered by this method

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26
Q

VLIW

A

In VLIW or CISC intercluster communication is necessary.

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27
Q

Within

A

Most communication will be within or outside the cluster

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28
Q

Less and little

A

With the cluster, much less or more communication intercluster, and very little or more memory communication.

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29
Q

Latency

A

A monolithic register file is better for latency or Speed? It does not scale, so clustering is a good
compromise.

30
Q

Two Types of Clustering

A
  • -Architecturally Invisible

- -Architecturally Visible

31
Q

Architecturally Invisible Clustering

A

–The hardware needs to copy between register files
–Detecting when copies of data are needed is hard
–All the registers need to be exposed in one operand field, so there is a large operand field
–Hardware stalls due to copying between registers, which is invisible to the compiler
–This solution is NOT scalable.
Is it visible or invisible?

32
Q

Architecturally Visible Clustering

A

The ISA must include a way to specify operations assigned to each cluster. Visible or Invisible?

33
Q

Architecturally Invisible Clustering

A

Appears as one large register file to the compiler. Visible or Invisible?

34
Q

Architecturally Visible Operations

A

–The copies between clusters are implicit copy or explicit copy
–Directly copy registers to registers in a different cluster
Visible or Invisible?

35
Q

Implicit copy

A

– operations may r/w operands in nonlocal registers. But complicated for scheduling and scalability issues. Implicit or Explicit Copy?

36
Q

Explicit copy

A

–only a special operation can access a remote register under compiler control and must be inserted in a special place in the code.
This may increase instruction issue pressure and code size. Implicit or Explicit Copy?

37
Q

Increase

A

Implicit and explicit copy operations increase or decrease critical path?

38
Q

True

A

True or False: With Implementation Constraints, dividing a single architecture into cluster increases costs, cycles, because the explicit copies and increased
requests on memory.

39
Q

False: clustered configuration becomes the better choice.

A

True or False: If we have increased clock speed and bypass logic, clustered configuration becomes an incorrect choice.

40
Q

False:
Increased clock frequency is modest,
so this is a viable choice for VLIW.

A

True or false: The increased clock frequency is not efficient so this is not a viable choice for VLIW.

41
Q

True or false: Full connectivity is not necessary between the clusters.

A

True

42
Q

True or false: Partial interconnectivity improves latency

A

False: Partial interconnectivity improves scalability.

43
Q

Partitioned files use less or more in area and dissipate less or more power.

A

Less and less

44
Q

True or false: The bypass network is partitioned and hierarchical.

A

True

45
Q

Predicate register banks

A

The contents of the registers do not commit until the predicates come true.

46
Q

Branch or Predicate register banks: decide which side of the bank and the instructions in them are to be executed

A

Branch

47
Q

True or False: In VLIW register files are general purpose. The compiler allocates registers regardless of their
intended use

A

True

48
Q

True or False: In DSP architectures there are address and data registers.

A

True

49
Q

In DSP architectures

A

–Address registers access memory
–Data registers used for data manipulation. The registers can be used for different data widths.
–Certain registers can only access certain functions. This can lead to redundant register movements. This can lead to compilation complexity.
VLIW or DSP?

50
Q

These register files go to a specific register in a file.

A

Indexed register files

51
Q

This type of register files uses a base + an offices

A

Index register file

52
Q

Describe rotating Register file

A

Rotate files using a round robin technique: As soon as the end of the files is reached, begin again.

53
Q

The area where the inputs, outputs, and variables of a function call reside in a register file.

A

Frame

54
Q

The compiler can explicitly allocate a variable sized section of the register file by processing the frame. Is a Register Spill or Frame?

A

Frame

55
Q

Frame

A

This is used for procedure call and return for stack management. Is a Register Spill or Frame?

56
Q

Frame advantages

A

The Advantage of allocating the Frame in a register file is it eliminates register rpills and restores at call boundaries.

57
Q

Register spill

A

When a function is called, all the variables in the register file must be stored in memory before the new variables can be loaded into the file.
Is this a Register Spill or Frame?

58
Q

Restore

A

When the function is called again, the variables have to be called from memory and restored to the register file. Is this a System Restore or a restore?

59
Q

False, they result in a very high overhead

A

True or False: Register spills and restores result in a very low overhead at the boundaries.

60
Q

Rotating Register Files

A

Indexed register files for which the base of the file periodically cycles across a set of registers. As registers are needed, they are assigned in order. Is this a rotating or Indexed register?

61
Q

True

A

True or False: Rotating Register Files are result in free registers in the lower register addresses and occupied registers are upper register addresses

62
Q

Rotation

A

This is a form of dynamic register renaming. Is this a rotating or Indexed register?

63
Q

Rotation

A

This is useful for software pipelining. Is this a rotating or Indexed register?

64
Q

Rotation

A

The compiler can generate small, compact codes using rotating register files or rotational registers?

65
Q

Both indexed and rotating

A

These files have implementation costs. Is this indexed or rotating or both

66
Q

Adding offset and base values is a small delay but it sits in the critical path and may slow down the register file. Is this indexed or rotating or both

A

Indexed

67
Q

_____ is a load/store architecture that mostly reuses RISC memory addressing concepts. Is this VLIW or RISC?

A

VLIW

68
Q

Memory Architecture for VLIW

A

The loads are separate and must be done before any operations can be done on them. Is this VLIW or RISC?

69
Q

______support special addressing modes. Is this VLIW or RISC?

A

VLIW

70
Q

Registers hold data and address

A

–So have more flexibility and control.
–Memory is banked and therefore power efficient
–Memory banks - a block of memory is separated into different sections. This will lead to concurrent access to memory. This is called XY
memory, the x bank provides the first operand, the second bank provides the second operand.
–GPUs are a special embedded system.

71
Q

T/F: Partitioned register files have lower access time but occupy a larger area and dissipate more power

A

False. occupy less are and dissipate less power because they have less ports

72
Q

T/F: The bypass network of a clustered VLIW is also partitioned.

A

True

CS 6291 Embedded Software (16 decks)

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