Lesson 3--Intro to ISA Flashcards

1
Q

3 types of instructions

A
  1. Data or memory access (load, store, etc.)
  2. Control flow (branch)
  3. Arithmetic or logic (add, subtract, etc.)
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

In ISA design what is an Operation?

A

fundamental RISC-like minimal unit of work

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

True or False: VLIW exposes a scheduler in the compiler

A

True. Superscalar hides this.

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

What’s the difference between Registers and Memory

A

Memory is off chip, not specialized, slow

Registers are On chip, connected to the logic of the processor, fast

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

VLIW Design Principles

A
  • -instructions consist of parallel operations. Compiler must guarantee safe parallel operations.
  • -Simplification of HW to improve energy efficiency.
  • -Latency and functional unit are exposed.
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

True or False: VLIW’s advantages come largely from having an intelligent compiler that can schedule many instructions simultaneously.

A

True

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

True or False: VLIW-compatible code is easily portable to hardware otehr than the chip it is designed for

A

False

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

True or False: VLIW has some problems with the inflexibility of its compiler-first design

A

True

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

Role of VLIW compilers

A
  1. Gather independent operations and bundle them into sections.
  2. Resolve all structural and resource hazards.
  3. If the VLIW is clustered, the compiler assigns operations to the clusters and generates cross cluster register references.
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

Horizontal Decisions

A

Decisions that need to occur when operations sharing the same variable occur within an instruction word

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

Vertical Decisions

A

Decisions across pipelined instructions. Such as load and stores that have latencies.

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

Fixed overhead encoding

A

Prepend mask bits to a VLIW instruction to identify “what goes where”
Mask0 = 10100111 this means put instructions in the ‘1’s slots and NOPs in the ‘0’ slots

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

Distributed encoding advantages

A
  • -Explicitly insert stop bit for delimiter
  • -Distributed and incremental encoding cost.
  • -No need to compute next PC.
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

Distributed encoding disadvantages

A
  • -More complex.

- -Bits are embedded as part of the instruction, so have to get them back to NOPs.

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

Fixed overhead encoding advantages

A

–Simple scheme, just need to track the instructions and the mask.

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

Fixed overhead encoding disadvantages

A

–Space overhead for the longest possible VLIW instruction. Must always encode length of mask.

17
Q

Template-based encoding advantages

A
  • -Low overhead

- -No penalty for short instructions.

18
Q

Template-based encoding disadvantages

A

Limited number of templates

19
Q

In ISA design what is an Instruction?

A

Fundamental unit of encoding. Refers to a parallel set of operations

20
Q

What is a Bundle?

A

Memory aligned encoding unit designed to occupy one word of memory.
In VEX a syllable is a bundle.