export_week 11chapter 9 input output

Question 1

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Basic Model of Processing speed or program execution

Answer 1

determined primarily by ability of I/O operations to stay ahead of processor.

Question 2

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I/O Requirements

Answer 2

▪ Means for addressing different peripheral devices ▪ A way for peripheral devices to initiate communication with the CPU ▪ An efficient means of transferring data directly between I/O and memory for large data transfers since programmed I/O is suitable only for slow devices and individual word transfers

Question 3

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I/O Requirements

Answer 3

▪ Buses that interconnect high-speed I/O devices with the computer must support high data transfer rates ▪ Means for handling devices with extremely different control requirements

Question 4

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I/O Interfaces Are necessary because of ?

Answer 4

▪ Different formats required by the devices ▪ Incompatibilities in speed between the devices and the CPU make synchronization difficult ▪ Bursts of data vs. streaming data ▪ Device control requirements that would tie up too much CPU time

Question 5

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Examples of I/O Devices

Question 6

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Simple I/O Configuration D?

Answer 6

https://s3.amazonaws.com/classconnection/655/flashcards/7082655/png/image77u8qx-14A61DE34A91D5DD827.png

Question 7

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More Complex I/O Module

Answer 7

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Question 8

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Advanced I/O Techniques

Answer 8

▪ Programmed I/O ▪ CPU controlled I/O ▪ Interrupt Driven I/O ▪ External input controls ▪ Direct Memory Access Controllers ▪ Method for transferring data between main memory and a device that bypasses the CPU

Question 9

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Programmed I/O traits ?

Answer 9

I/O data and address registers in CPU ▪ One word transfer per I/O instruction ▪ Address information for each I/O device ▪ LMC I/O capability for 100 devices ▪ Full instruction fetch/execute cycle

Question 10

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where is programmed I/O used ?

Answer 10

▪ Primary use: ▪ keyboards ▪ communication with I/O modules (see DMA)

Question 11

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Programmed I/O Example

Answer 11

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Question 12

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Programmed I/O Example

Answer 12

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Question 13

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Interrupt Terminology ▪ Interrupt lines (hardware

Answer 13

▪ One or more special control lines to the CPU

Question 14

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Interrupt request

Answer 14

dont know

Question 15

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▪ Interrupt handlers

Answer 15

▪ Program that services the interrupt ▪ Also known as an interrupt routine or device driver

Question 16

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▪ Context of interrupts

Answer 16

▪ Saved registers of a program before control is transferred to the interrupt handler ▪ Allows program to resume exactly where it left off when control returns to interrupted program

Question 17

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Use of Interrupts ?

Answer 17

▪ Notify that an external event has occurred ▪ real-time or time-sensitive ▪ Signal completion ▪ printer ready or buffer full ▪ Allocate CPU time ▪ time sharing ▪ Indicate abnormal event (CPU originates for notification and recovery) ▪ illegal operation, hardware error ▪ Software interrupts

Question 18

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The CPU - The Interrupt Cycle how ?D

Answer 18

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Question 19

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Servicing the Interrupt

Answer 19

1. Lower priority interrupts are held until higher priority interrupts are complete 2. Suspend program in progress 3. Save context, including last instruction executed and data values in registers, in the PCB or the stack area in memory 4. Branch to interrupt handler progra

Question 20

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Servicing an Interrupt

Answer 20

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Question 21

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what are Interrupt Processing Methods?

Answer 21

1.Vectored interrupt ▪ Address of interrupting device is included in the interrupt ▪ Requires additional hardware to implement 2.▪ Polling ▪ Identifies interrupting device by polling each device ▪ General interrupt is shared by all devices

Question 22

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Vectored Interrupts

Answer 22

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Question 23

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Polled Interrupts

Answer 23

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Question 24

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Print Handler Interrupt

Answer 24

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Question 25

# , Using an Interrupt for Time Sharing

Answer 25

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Question 26

# , Multiple Interrupts Example

Answer 26

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Question 27

# , how is Direct Memory Access happen ?

Answer 27

1. Transferring large blocks of data 2. Direct transfer to and from memory 3. CPU not actively involved in transfer itself

Question 28

# , Required conditions for DMA ?

Answer 28

▪ The I/O interface and memory must be connected ▪ The I/O module must be capable of reading and writing to memory ▪ Conflicts between the CPU and the I/O module must be avoided ▪ Interrupt required for completion

Question 29

# , DMA Instructions

Answer 29

Application program requests I/O service from operating system privileged programmed I/O instructions

Question 30

# , To initiate DMA, programmed I/O is used to send the following information:

Answer 30

1. location of data on I/O device 2. the starting location in memory 3. the size of the block 4. read/write

Question 31

# , when Interrupt to CPU in DMA?

Answer 31

Interrupt to CPU upon completion of DMA

Question 32

# , DMA Initiation and Control

Answer 32

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Question 33

# , I/O Module Interfaces

Answer 33

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Question 34

# , I/O Module Functions

Answer 34

▪ Recognizes messages from device(s) addressed to it and accepts commands from the CPU ▪ Provides a buffer where the data from memory can be held until it can be transferred to the device ▪ Provides the necessary registers and controls to perform a direct memory transfer ▪ Physically controls the device ▪ Copies data from its buffer to the device/from the CPU to its buffer ▪ Communicates with CPU

Question 35

# , Input/Output Characteristics

Answer 35

– Many orders of magnitude slower than memory – Character vs. block based – Burst vs. steady transfers

Question 36

# , Three approaches to I/O

Answer 36

– Programmed – Interrupt-driven – Direct memory acces

Question 37

# , Programmed I/O

Answer 37

– CPU is responsible for reading/writing to devices – Special “input” instruction on CPU – I/O data register and I/O address register – Each device is assigned a unique address.

Question 38

# , Programmed I/O types

Answer 38

– Memory mapped I/O alternative – Treat the I/O device as a memory address for reads and writes. Simplifies programmer interface; slightly more complicated control circuitry. – Problems with all programmed I/O – Must check status bits to see if I/O is “ready.” – Use a polling loop (busy-wait) to send and receive data to devices.

Question 39

# , Interrupts

Answer 39

– Busy-waits (polling) wastes resources but has simpler hardware. – Alternative: After an I/O request from the CPU, let the I/O device notify the CPU when data is ready to be read (called an interrupt)

Question 40

# , Alternative: After an I/O request from the CPU, let the I/O device notify the CPU when data is ready to be read (called an interrupt).

Answer 40

Each device is assigned an IRQ line (signal). I/O controller sets IRQ line status high. CPU detects IRQ at beginning of fetch/execute. CPU saves state of running program and switches to an IRQ handler routine. Routine services the request. Control is returned to the previously running code

Question 41

# , Problems with interrupt driven I/O

Answer 41

CPU still involved with each interrupt – Only transfers a single byte/word

Question 42

# , did you know Only transfers a single byte/word

Answer 42

Disk or network transfers may be hundreds or thousands of bytes. IRQ handler code may be hundreds of instructions. Still too much overhead.

Question 43

# , DMA

Answer 43

– Direct Memory Access (DMA) – Add a specialized kind of CPU that can directly transfer data from device to memory.

Question 44

# , Purely programmed I/O requires special I/O instructions,

Answer 44

, I/O data and address registers, and polling loops that waste CPU resources.

Question 45

# , Interrupt-driven I/O avoids

Answer 45

busy-waiting but is unsuitable for large block transfers due to interrupt handler execution overhead.

Question 46

# , DMA combines PIO and IRQ handlers

Answer 46

with a special controller to transfer large amounts of block data efficiently directly to memory.