Executable Processor Modules Flashcards
List the 6 types of RISC-V instruction
- R-type
- I-type
- S-type
- B-type
- U-type
- J-type
Draw the encoding of an R-type instruction
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Draw the encoding of an I-type instruction
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Draw the encoding of an S-type instruction
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Draw the encoding of an B-type instruction
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Draw the encoding of an U-type instruction
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Draw the encoding of an J-type instruction
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Which fields is the instruction function encoded in?
opcode, funct3, funct7
Why can there be more R-type than U-type instructions?
R-type instructions have more bits taken up by opcode, funct3 and funct7 (U-type instructions do not have funt3 or funct7 fields), which are the fields the instruction function is encoded in, so there are more possible function encodings
List the 4 addressing modes, used to address the operands
- Register
- Immediate
- Base
- PC-relative
What does it mean to sign extend?
Duplicate the leftmost bit as many times as needed
Which type of operations are R-type?
register-to-register
List R type instructions
ADD, SUB
XOR, OR, AND
SLL (shift left logical) - zeros shifted in
rf[rd] = rf[rs1] «_space;rf[rs2]
SRL (shift right logical) - zeros shifted in
rf[rd] = unsigned(rf[rs1]»_space; rf[rs2])
SRA (shift right arithmetic) - sign extended
rf[rd] = signed(rf[rs1]»_space; rf[rs2])
SLT - rf[rd] = (rf[rs1] < rf[rs2]) ? 1 : 0
SLTU (unsigned version of SLT)
List R type shift immediate instructions
rs2 = shift amount
SLLI = logical shift left (zeros shifted into the botton bits)
SRLI = logical shift right (zeroes shifted into the top bits)
SRAI = arithmetic shift right (the original sign bit shifted into the vacated bits)
List I-type arithmetic/shift instructions
ADDI, ORI, XORI, ANDI
SLTI - rf[rd] = (rf[rs1]<imm) ? 1 : 0
SLTIU - unsigned version of SLTI
What are I-type arithmetic/shift operations?
Arithmetic operations where one operand is a constant provided by a 12-bit sign extended immediate
List I-type load instructions
LW = load 32 bit word
LB = load byte (read sign extended into rf[rd])
LH = load half word (2 bytes) (read sign extended into rf[rd])
LBU, LHU = read unsigned versions of the ones above
What are I-type load operations?
address = rf[rs1] + imm
The immediate specifies the offset from the register to be read from memory
What are S-type instructions?
Store instructions. Note that normally the register order in instructions is destination, source but in store instructions it is the opposite way round
address = rf[rs1] + imm
Write rf[rs2] to memory: memory[address] = rf[rs2]
List S-type store instructions
SB = store byte
SH = store half-word
SW = store word (lower 4 bytes)
What are B-type branch instructions?
if(condition), pc = pc + imm
List B-type branch instructions
BEQ rf[rs1] == rf[rs2]
BNE
BLT
BGE
BLTU and BGEU - unsigned versions
What are U-type instructions used for?
Forming large constants
What is an LUI instruction?
Load upper immediate U-type
Constant is formed with the upper 20 bits from the immediate and the bottom 12 bits are zero. Use ADDI to add in the bottom 12 bits to form a 32-bit constant
rf[rd] = U_immediate
