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Microprocessors > Chapter 2-1 > Flashcards

Chapter 2-1 Flashcards

1
Q

Is considered as this because its registers are used during application programming and are specified by the instructions.

A

Program Visible

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2
Q

Are considered as this because they are not addressable directly during applications programming, but may be used indirectly during system programming.

A

Program Invisible

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3
Q

What are the 8-bit registers

A

AH, AL, BH, BL, CH, CL, DH, DL

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4
Q

Are referred to when an instruction is formed using two-letter designations.

A

8-bit registers

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5
Q

What are the 16-bit registers

A

AX, BX, CX, DX, SP, BP, DI, SI, IP, FLAGS, CS, DS, ES, SS, FS, GS

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6
Q

What are the 32-bit registers?

A

EAX, EBX, ECX, EDX, ESP, EBP, EDI, ESI, EIP, EFLAGS

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7
Q

Override used to access lower-order byte

A

B

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8
Q

Override used to access lower-order word

A

W

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9
Q

Override used to access lower-order doubleword

A

D

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10
Q

Override used to access lower-order quadword

A

There is no special letter

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11
Q

What are the Multipurpose Registers?

A

RAX, RBX, RCX, RDX, RBP, RDI, RSI, R8 - R15

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12
Q

Is used for instructions such as multiplication, division and some of the adjustment instructions.

A

Accumulator (RAX)

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13
Q

32, 16, and 8 bit register reference of RAX

A

EAX; AX; AH or AL

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14
Q

Sometimes holds the offset address of a location in the memory system in all versions of the microprocessor.

A

Base Index (RBX)

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15
Q

32, 16, and 8 bit register reference of RBX

A

EBX; BX; BH & BL

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16
Q

Is a general-purpose register that also holds the count for various instructions.

A

Count (RCX)

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17
Q

32, 16, and 8 bit register reference of RCX

A

ECX; CX; CH or CL

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18
Q

Uses CL as the count

A

Shift and Rotate Intructions

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19
Q

Uses CX as count

A

Repeated String Instructions

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20
Q

Uses either CX or ECX as count

A

LOOP/LOOPD Instructions

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21
Q

If operated in the 64-bit mode, uses RCX for the counter.

A

LOOP

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22
Q

Examples of repeated string instructions

A

REP / REPE / REPNE

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23
Q

What does REP represent?

A

Repeat

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24
Q

What does REPE represent?

A

Repeat while Equal

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25
Q

What does REPNE represent?

A

Repeat while Not Equal

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26
Q

is a general-purpose register that holds a part of the result from a multiplication or part of the dividend before a division.

A

Data (RDX)

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27
Q

32, 16, and 8 bit register reference of RDX

A

EDX; DX; DH or DL

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28
Q

points to a memory location in all versions of the microprocessor for memory data transfers.

A

Base Pointer (RBP)

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29
Q

32, 16, and 8 bit register reference of RBP

A

EBP; BP; none

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30
Q

often addresses string destination data for the string instructions.

A

Destination Index (RDI)

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31
Q

32, 16, and 8 bit register reference of RDI

A

EDI; DI; none

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32
Q

often addresses source string data for the string instructions.

A

Source Index (RSI)

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33
Q

32, 16, and 8 bit register reference of RSI

A

ESI; SI; none

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34
Q

These registers are only found in the Pentium 4 and Core2 if 64-bit extensions are enabled.

A

R8 through R15

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35
Q

What are the special-purpose registers?

A

RIP, RSP and RFLAGS

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36
Q

What are the segment registers?

A

CS, DS, ES, SS, FS, and GS

37
Q

addresses the next instruction in a section of memory defined as a code segment.

A

Instruction Pointer (RIP)

38
Q

32, 16, and 8 bit register reference of RIP

A

EIP; IP; none

39
Q

How many bit address does RIP contain at present to address a 1T flat address space?

A

40-bit address

40
Q

addresses an area of memory called the stack.

A

Stack Pointer (RSP)

41
Q

stores data through this pointer and is explained later in the text with the instructions that address stack data.

A

Stack Memory

42
Q

32, 16, and 8 bit register reference of RSP

A

ESP; SP; none

43
Q

indicate the condition of the microprocessor and control
its operation.

A

RFLAGS

44
Q

32, 16, and 8 bit register reference of RFLAGS

A

EFLAGS; FLAGS; none

45
Q

What are the flag bits?

A

ID, VIP, VIF, AC, VM, RF, _ , NT, IOP1, IOP0, O, D, I, T, S, Z, _ , A, _ , P, _ , C

46
Q

holds the carry after addition or the borrow after subtraction.

A

Carry (C)

47
Q

is the count of ones in a number expressed as even or odd.

A

Parity (P)

48
Q

Parity of logic 0

A

Odd Parity

49
Q

Parity of logic 1

A

Even Parity

50
Q

holds the carry (half-carry) after addition or the borrow after subtraction between bit positions 3 and 4 of the result.

A

Auxiliary Carry (A)

51
Q

shows that the result of an arithmetic or logic operation is
zero.

A

Zero (Z)

52
Q

holds the arithmetic sign of the result after an arithmetic
or logic instruction executes.

A

Sign (S)

53
Q

Sign bit if S = 1

A

set or negative

54
Q

Sign bit if S = 0

A

cleared or positive

55
Q

enables trapping through an on-chip debugging
feature.

A

Trap (T)

56
Q

T flag logic that makes the microprocessor interrupt the flow of the program on conditions as indicated by the debug registers and control registers

A

Logic 1

57
Q

T flag logic that disables the trapping (debugging) feature

A

Logic 0

58
Q

controls the operation of the INTR (interrupt
request) input pin

A

Interrupt (I)

59
Q

Status of the INTR pin when I = 1

A

enabled

60
Q

Status of the INTR pin when I = 0

A

disabled

61
Q

What controls the state of the I flag bit?

A

STI (set I flag) and CLI (clear I flag) instructions

62
Q

selects either the increment or decrement mode for the DI and/or SI registers during string instructions

A

Direction (D)

63
Q

What happens to the registers when D = 1?

A

Decremented

64
Q

What happens to the registers when D = 0?

A

Incremented

65
Q

What controls the state of the D flag bit?

A

STD (set direction) and CLD (clear direction) instructions

66
Q

indicates that the result has exceeded the capacity of the
machine.

A

Overflow (O)

67
Q

is used in protected mode operation to select the privilege level for I/O devices.

A

I/O privilege level (IOPL)

68
Q

What happens when the current privilege level is higher or more trusted than the IOPL?

A

I/O executes without hindrance

69
Q

What happens if the IOPL is lower than the current privilege level

A

interrupt occurs, causes execution to suspend

70
Q

Highest or most trusted IOPL level

A

00

71
Q

Lowest or least trusted IOPL level

A

11

72
Q

indicates that the current task is nested within
another task in protected mode operation.

A

Nested Task (NT)

73
Q

is used with debugging to control the resumption of
execution after the next instruction.

A

Resume (RF)

74
Q

selects virtual mode operation in a protected mode
system.

A

Virtual Mode (VM)

75
Q

allows multiple DOS memory partitions that are 1M byte in length to coexist in the memory system.

A

Virtual Mode System

76
Q

is used to simulate DOS in the modern Windows environment.

A

Virtual Mode (VM)

77
Q

activates if a word or doubleword is addressed on a non-word or non-doubleword boundary.

A

Alignment Check (AC)

78
Q

is a copy of the interrupt flag bit available to the Pentium– Pentium 4 microprocessors.

A

Virtual Interrupt (VIF)

79
Q

provides information about a virtual mode interrupt for the Pentium–Pentium 4 microprocessors. This is used in multitasking environments to provide the operating system with virtual interrupt flags and interrupt pending information

A

Virtual Interrupt Pending (VIP)

80
Q

indicates that the Pentium–Pentium 4 microprocessors
support the CPUID instruction.

A

Identification (ID)

81
Q

provides the system with information about the Pentium microprocessor, such as its version number and manufacturer

A

CPUID

82
Q

generate memory addresses when combined with other registers in the microprocessor.

A

Segment Registers

83
Q

is a section of memory that holds the code
(programs and procedures) used by the microprocessor.

A

Code (CS)

84
Q

is a section of memory that contains most data used
by a program.

A

Data (DS)

85
Q

is an additional data segment that is used by some of the string instructions to hold destination data.

A

Extra (ES)

86
Q

defines the area of memory used for the stack.

A

Stack (SS)

87
Q

is determined by the stack segment and stack
pointer registers.

A

Stack Entry Point

88
Q

are supplemental segment registers available in the 80386–Core2 microprocessors to allow two additional memory segments for access by programs.

A

FS and GS

Microprocessors (28 decks)

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