Chapter 2-1 Flashcards
Is considered as this because its registers are used during application programming and are specified by the instructions.
Program Visible
Are considered as this because they are not addressable directly during applications programming, but may be used indirectly during system programming.
Program Invisible
What are the 8-bit registers
AH, AL, BH, BL, CH, CL, DH, DL
Are referred to when an instruction is formed using two-letter designations.
8-bit registers
What are the 16-bit registers
AX, BX, CX, DX, SP, BP, DI, SI, IP, FLAGS, CS, DS, ES, SS, FS, GS
What are the 32-bit registers?
EAX, EBX, ECX, EDX, ESP, EBP, EDI, ESI, EIP, EFLAGS
Override used to access lower-order byte
B
Override used to access lower-order word
W
Override used to access lower-order doubleword
D
Override used to access lower-order quadword
There is no special letter
What are the Multipurpose Registers?
RAX, RBX, RCX, RDX, RBP, RDI, RSI, R8 - R15
Is used for instructions such as multiplication, division and some of the adjustment instructions.
Accumulator (RAX)
32, 16, and 8 bit register reference of RAX
EAX; AX; AH or AL
Sometimes holds the offset address of a location in the memory system in all versions of the microprocessor.
Base Index (RBX)
32, 16, and 8 bit register reference of RBX
EBX; BX; BH & BL
Is a general-purpose register that also holds the count for various instructions.
Count (RCX)
32, 16, and 8 bit register reference of RCX
ECX; CX; CH or CL
Uses CL as the count
Shift and Rotate Intructions
Uses CX as count
Repeated String Instructions
Uses either CX or ECX as count
LOOP/LOOPD Instructions
If operated in the 64-bit mode, uses RCX for the counter.
LOOP
Examples of repeated string instructions
REP / REPE / REPNE
What does REP represent?
Repeat
What does REPE represent?
Repeat while Equal
What does REPNE represent?
Repeat while Not Equal
is a general-purpose register that holds a part of the result from a multiplication or part of the dividend before a division.
Data (RDX)
32, 16, and 8 bit register reference of RDX
EDX; DX; DH or DL
points to a memory location in all versions of the microprocessor for memory data transfers.
Base Pointer (RBP)
32, 16, and 8 bit register reference of RBP
EBP; BP; none
often addresses string destination data for the string instructions.
Destination Index (RDI)
32, 16, and 8 bit register reference of RDI
EDI; DI; none
often addresses source string data for the string instructions.
Source Index (RSI)
32, 16, and 8 bit register reference of RSI
ESI; SI; none
These registers are only found in the Pentium 4 and Core2 if 64-bit extensions are enabled.
R8 through R15
What are the special-purpose registers?
RIP, RSP and RFLAGS
What are the segment registers?
CS, DS, ES, SS, FS, and GS
addresses the next instruction in a section of memory defined as a code segment.
Instruction Pointer (RIP)
32, 16, and 8 bit register reference of RIP
EIP; IP; none
How many bit address does RIP contain at present to address a 1T flat address space?
40-bit address
addresses an area of memory called the stack.
Stack Pointer (RSP)
stores data through this pointer and is explained later in the text with the instructions that address stack data.
Stack Memory
32, 16, and 8 bit register reference of RSP
ESP; SP; none
indicate the condition of the microprocessor and control
its operation.
RFLAGS
32, 16, and 8 bit register reference of RFLAGS
EFLAGS; FLAGS; none
What are the flag bits?
ID, VIP, VIF, AC, VM, RF, _ , NT, IOP1, IOP0, O, D, I, T, S, Z, _ , A, _ , P, _ , C
holds the carry after addition or the borrow after subtraction.
Carry (C)
is the count of ones in a number expressed as even or odd.
Parity (P)
Parity of logic 0
Odd Parity
Parity of logic 1
Even Parity
holds the carry (half-carry) after addition or the borrow after subtraction between bit positions 3 and 4 of the result.
Auxiliary Carry (A)
shows that the result of an arithmetic or logic operation is
zero.
Zero (Z)
holds the arithmetic sign of the result after an arithmetic
or logic instruction executes.
Sign (S)
Sign bit if S = 1
set or negative
Sign bit if S = 0
cleared or positive
enables trapping through an on-chip debugging
feature.
Trap (T)
T flag logic that makes the microprocessor interrupt the flow of the program on conditions as indicated by the debug registers and control registers
Logic 1
T flag logic that disables the trapping (debugging) feature
Logic 0
controls the operation of the INTR (interrupt
request) input pin
Interrupt (I)
Status of the INTR pin when I = 1
enabled
Status of the INTR pin when I = 0
disabled
What controls the state of the I flag bit?
STI (set I flag) and CLI (clear I flag) instructions
selects either the increment or decrement mode for the DI and/or SI registers during string instructions
Direction (D)
What happens to the registers when D = 1?
Decremented
What happens to the registers when D = 0?
Incremented
What controls the state of the D flag bit?
STD (set direction) and CLD (clear direction) instructions
indicates that the result has exceeded the capacity of the
machine.
Overflow (O)
is used in protected mode operation to select the privilege level for I/O devices.
I/O privilege level (IOPL)
What happens when the current privilege level is higher or more trusted than the IOPL?
I/O executes without hindrance
What happens if the IOPL is lower than the current privilege level
interrupt occurs, causes execution to suspend
Highest or most trusted IOPL level
00
Lowest or least trusted IOPL level
11
indicates that the current task is nested within
another task in protected mode operation.
Nested Task (NT)
is used with debugging to control the resumption of
execution after the next instruction.
Resume (RF)
selects virtual mode operation in a protected mode
system.
Virtual Mode (VM)
allows multiple DOS memory partitions that are 1M byte in length to coexist in the memory system.
Virtual Mode System
is used to simulate DOS in the modern Windows environment.
Virtual Mode (VM)
activates if a word or doubleword is addressed on a non-word or non-doubleword boundary.
Alignment Check (AC)
is a copy of the interrupt flag bit available to the Pentium– Pentium 4 microprocessors.
Virtual Interrupt (VIF)
provides information about a virtual mode interrupt for the Pentium–Pentium 4 microprocessors. This is used in multitasking environments to provide the operating system with virtual interrupt flags and interrupt pending information
Virtual Interrupt Pending (VIP)
indicates that the Pentium–Pentium 4 microprocessors
support the CPUID instruction.
Identification (ID)
provides the system with information about the Pentium microprocessor, such as its version number and manufacturer
CPUID
generate memory addresses when combined with other registers in the microprocessor.
Segment Registers
is a section of memory that holds the code
(programs and procedures) used by the microprocessor.
Code (CS)
is a section of memory that contains most data used
by a program.
Data (DS)
is an additional data segment that is used by some of the string instructions to hold destination data.
Extra (ES)
defines the area of memory used for the stack.
Stack (SS)
is determined by the stack segment and stack
pointer registers.
Stack Entry Point
are supplemental segment registers available in the 80386–Core2 microprocessors to allow two additional memory segments for access by programs.
FS and GS