๐๐ฏ๐ฅ ๐ฐ๐ง ๐๐ฉ๐ข๐ฑ๐ต๐ฆ๐ณ ๐๐ถ๐ฎ๐ฎ๐ข๐ณ๐ช๐ฆ๐ด Flashcards
What are the three types of unconditional jump instructions?
short, near, far, wherever you are
allows a branch to within +127 and -128 bytes
Short Jump
allows a jump to any location in the current code segment
Near Jump
allows a jump to any location in the memory system
Far Jump
Whenever a label appears with a JMP instruction or conditional jump, the label, must be followed by a ______
Colon
The _____ that follows a short or near jump is the distance from the next instruction to the jump location.
Displacement
jump to the location stored in a memory word
Near Indirect Jump
jump to the location stored in a memory doubleword
Far Indirect Jump
Are all short jumps that test one or more of the flag bits
Conditional Jumps
A special conditional jump instruction that decrements CX and jumps to the label when CX is not 0.
LOOP
The _______ instruction jumps if CX is not 0 and if an equal condition exists.
LOOPE
The _______ instruction jumps if CX is not 0 and if an not equal condition exists.
LOOPNE
are groups of instructions that perform one task and are used from any point in the program.
Procedureq
instruction that links to a procedure
CALL
instruction that returns from a procedure
RET
directive that defined the name and type of procedure
PROC
declares the end of the procedure
ENDP
is a combination of a PUSH and a JMP instruction
CALL
places the contents of IP on the stack
Near CALL
places both IP and CS on the stack
Far CALL
removes the return address from the stack and placing it into IP
Near Return
removes the return address from the stack and placing it into IP and CS
Far Return
are either software instructions similar to CALL or hardware signals used to call procedures
Interrupts
returns control to the interrupted software
IRET
How many interrupt vectors exist in the first 1KB of memory?
256 interrupt vectors
How many interrupt vectors are defined by Intel?
32
How many interrupt vectors are user interrupts?
224
must be used to return from an interrupt service procedure
IRET
a conditional interrupt that calls an interrupt service procedure if the overflow flag is 1
INTO
tests the condition of the BUSY or TEST pin on the microprocessor
WAIT
passes instruction to the numeric coprocessor
ESC
compares the contents of any 16 bit register against the contents of two words of memory
BOUND
holds local memory variables for the procedure
stack frame
creates the stack frame
ENTER
removes the stack frame from the stack
LEAVE
The ____ clock generator provides the system clock (CLK), READY synchronization, and RESET synchronization
8284A
is used by the microprocessor to send the address to the memory or I/O and the ALE signal to the demultiplexers
T1
is used to send data to memory for a write and to test the READY pin and activate control signals RD or WR
T2
allows the memory time to access data and allows data to be transferred between the microprocessor and the memory or I/O
T3
is where data are written
T4
A bus cycle that consists of ___ clocking periods act as the basic system timing.
4
Stretch the bus cycle by one or more clocking periods to allow the memory and I/O additional access time.
Wait states (Tw)
How many combinations can 10 address pins have?
1024
is programmed by an EPROM programmer and can be erased if exposed to ultraviolet light
EPROM
is programmed in the system by using a 12 V or 5.0 V programming pulse.
Flash Memory (EEPROM)
retains data for as long as the system power supply is attached.
Static RAM (SRAM)
retains data for only a short period, usually 2โ4 ms.
Dynamic RAM (DRAM)
3-to-8 line decoder
74LS138
2-to-4 line decoder
74LS139
The ______ address decoder for microprocessors like the 8088 through the Pentium 4 reduce
the number of integrated circuits required to complete a functioning memory system.
PLD
Many EPROMs available today have an access time of _______, which is too slow for the 5 MHz 8088. In order to circumvent this problem, a wait state is inserted to increase
memory access time to _______.
450 ns, 660 ns
________ features are also available for memory systems, but these require the storage of many more bits.
Error-correction
The __________ of memory is enabled by the BHE control signal
High Bank
The __________ of memory is enabled by the A0 address signal or by the BLE control signal
Low Bank
The 8086โCore2 microprocessors have two basic types of I/O instructions:
IN and OUT
inputs data from an external I/O device into either the AL (8-bit) or AX (16-bit) register
IN
outputs data from AL or AX to an external I/O device and is available as a fixed, variable, or string instruction.
OUT
sometimes called direct I/O
Isolated I/O
uses a separate map for the I/O space, freeing the entire memory for use by the program.
Isolated I/O
uses a portion of the memory space for I/O transfers
Memory-mapped I/O
is either built into a programmable peripheral or located separately.
Buffer
All input devices are ______ so that the I/O data are connected only to the data bus during the execution of the IN instruction.
buffered
All output devices use a _____ to capture output data during the execution of the OUT
instruction
latch
is the act of two independent devices synchronizing with a few
control lines.
Handshaking or Polling
are required for most switch-based input devices and for most output devices that are not TTL-compatible
Interfaces
decodes only a l6-bit address for variable port instructions and often an 8-bit port number for fixed I/O instructions
I/O port decoder
decodes the entire address
Memory Address Decoder
is a programmable peripheral interface (PPI) that has 24 I/O pins that are programmable in two groups of 12 pins each (group A and group B).
82C55
Mode 0 of 82C55
Simple I/O
Mode 1 of 82C55
Strobed I/O
Mode 2 of 82C55
Bidirectional I/O
The ________ device requires a fair amount of software, but it displays ASCII-coded
information
LCD Display
The ______ is a programmable interval timer that contains three l6-bit counters that count in binary or binary-coded decimal (BCD)
8254
Modes of 8254
0 - Events Counter
1 - retriggerable, monostable multivibrator
2 - pulse generator
3 - square-wave generator
4 - software-triggered pulse generator
5 - hardware-triggered pulse generator
The _______ is a programmable communications interface, capable of receiving and transmitting
asynchronous serial data
16550
The ________ is an 8-bit digital-to-analog converter that converts a digital signal to an analog
voltage within 1.0 ฮผs
DAC0830
The _______ is an 8-bit analog-to-digital converter that converts an analog signal into a
digital signal within 100 ฮผs.
ADC0804
