๐๐ต๐ฎ๐ฝ๐๐ฒ๐ฟ ๐ญ๐ญ: Basic I/O Interface Flashcards
o transfers information to an I/O device
- OUT
o read information from an I/O device
- IN
o 8-bit form (p8)
- fixed address
o 16 bit I/O address
- Variable address
o the I/O address
- Port number
- ISA
o industry standard architecture
o most common I/O transfer technique used in the Intel microprocessor-based system
- isolated I/O
o does not use the IN, INS, OUT, or OUTS instructions
- Memory-Mapped I/O
o uses any instruction that transfers data between the microprocessor and memory
- Memory-Mapped I/O
o Three-state buffers are used to construct the 8-bit input port
- Basic Input Interface
o receives data from the microprocessor and usually must hold it for some external device.
- Basic Output Interface
o Also called polling
- Handshaking
o synchronizes the I/O device with the microprocessor
- Handshaking
o Are TTL and compatible, and therefore can be connected to the microprocessor and its interfacing components, or they are switch-based
- Input Devices
o are far more diverse than input devices, but many are interfaced in a uniform manner
- Output Devices
o programmable peripheral interface
- PPI
o very popular, low-cost interfacing component found in many applications
- PPI
o can interface any TTL-compatible I/O device to the microprocessor
- 82C55
o have replaced LED displays in many applications
- LCD
o a digital motor because it is moved in discrete steps as it traverses through 360ยฐ
- stepper motor
o This allows external data to be stored into the port until the microprocessor is ready to retrieve it
- Mode 1 Strobed Input
o loads data into the port latch, which holds the information until it is input to the microprocessor via the IN instruction
- STB
- STB
o Strobe
o an output indicating that the input latch contains information
- IBF
- IBF
o Input buffer full
o an output that requests an interrupt
o Interrupt request
- INTE
o interrupt enable
o is neither an input nor an output; it is an internal bit programmed via the port PC4 (port A) or PC2 (port B) bit position
- INTE
o The port C pins 7 and 6 are general-purpose I/O pins that are available for any purpose.
- PC7, PC6
o strobed input device
- Keyboard
o an output that goes low whenever data are output (OUT) to the port A or port B latch
- OBF
- OBF
o Output buffer full
o causes the pin to return to a logic 1 level. The signal is a response from an external device, indicating that it has received the data from the 82C55 port
- ACK
- ACK
o acknowledge signal
o a signal that often interrupts the microprocessor when the external device receives the data via the ACK signal.
- INTR
- INTR
o Interrupt request
o is neither an input nor an output; it is an internal bit programmed to enable or disable the INTR pin
- INTE
o strobe data into the printer
- DS
- DS
o Data strobe
o an output used to interrupt the microprocessor for both input and output conditions.
- INTR
o an output indicating that the output buffer contains data for the bidirectional bus
- OBF
o an input that enables the three-state buffers so that data can appear on port A
- ACK
o loads the port A input latch with external data from the bidirectional port A bus
- STB
o an output used to signal that the input buffer contains data for the external bidirectional bus
- IBF
o are internal bits (INTE1 and INTE2) that enable the INTR pin
- INTE
o These pins are general-purpose I/O pins in mode 2 controlled by the bit set and reset command
- PC0, PC1, PC2
- A0, A1
o Address inputs
o select one of four internal registers within the 8254
- A0, A1
the timing source for each of the internal counters
- CLK
o enables the 8254 for programming and reading or writing a counter
- CS
o controls the operation of the counter in some modes of operation
- G
- G
Gate
o connects to the system ground bus
- GND
o counter output
- OUT
o where the waveform generated by the timer is available
- OUT
o causes data to be read from the 8254 and often connects to the IORC signal
- RD
- RD
o Read
o Connects to the +5.0V power supply
- Vcc
o causes data to be written to the 8254 and often connects to the write strobe IOWC
- WR
o Allows the 8254 counter to be used as an events counter
- MODE 0
o Causes the counter to function as a retriggerable, monostable multivibrator
- MODE 1
o Allows the counter to generate a series of continuous pulses that are one clock pulse wide
- MODE 2
o Generates a continuous square wave at the OUT connection, provided that the G pin is a logic 1
- MODE 3
o Allows the counter to produce a single pulse at the output
- MODE 4
o A hardware triggered one-shot that functions as mode 4, except that it is started by a trigger pulse on the G pin instead of by software
- MODE 5
o programmable communications interface designed to connect to virtually any type of serial interface
- PC16550D
o transmitted and received without a clock or timing signal
- Asynchronous Serial Data
PLCC
o Plastic leadless chip carrier
FM
o Frequency modulation
CB
o Citizens band
o address inputs are used to select an internal register for programming and also data transfer
- A0, A1, A2
- ADS
o Address strobe
o used to latch the address lines and chip select lines
- ADS
o where the clock signal generated by the baud rate generator from the transmitter section is made available
- BAUDOUT
o must all be active to enable the 16550 UART
- CS0, CS1, CS2
o indicates that the modem or data set is ready to exchange information
- CTS
- CTS
o Clear to send
o received data contain the wrong parity
- parity error
o start and stop bits are not in their proper places
- framing error
o data have overrun internal receiver FIFO buffer
- overrun error
