4 - processor fundamentals Flashcards
von neuman archirtecrue
- there is a processor - CPU
- processor has direct access to memory
- memory contains a stored program and data required by the program
- stored program consists of individual instructions
- the processor executes instructions sequentially
components of the CPU
- CU
- registers
- ALU
- cache
clock
used to synchronise processes
internal clock - controls cycles of activity within the processor
system clock - controls activities outside of the processor
- has a defined freq for its clock cycle (clock speed) - defines the minimum time separating successive activities
registers
- close so quick access
- used for storage
- general purpose or specific (accumulator is the only general purpose)
ALU
– carries out arithmetic and logical operations such as mathematical operations and comparisons or Boolean logic
control unit
– coordinates the operations of a computer – communicates with components
accumulator - ACC
a general purpose register that stores a value before/after execution of an instruction by the ALU
CIR
stores the current instruction while it is being decoded and executed
IX
stores a value - only used for index addressing
MAR
stores address of a memory location or an I/O device
MDR
stores data that has just been read from or is about to be written to memory
PC
stores the adress of where the next instruction is to be read from
SR
contains bits that are either set or cleared which can be referenced individually
system bus
- buses transfer data between components
- each wire carries a single bit
- connects CPU to memory and I/O devices
- address, controll and data
control bus
- transmits signal from CU to system components or from components to CU
- bi directional
- carries timing signals
address bus
- carries an address
- adress is loaded from MAR and specifies a location in memory
- one directional - to a memory controller or I/O controlled not back to CPU
data bus
- carries data
- from processor to memory or output device
- or from memory or input device to processor
- bi directional
factors affecting performance
- processor type/ no. cores - multi core and parallel processing means multiple instructions can happen simultaneously
- bus width - ideally same as word length or half - larger bus width = more bits transferred at once
- clock speed - clock cycle defines shortest time an - - action can take
- cache - closer so faster to access
word
a small number of bytes that can be handled as a unit by the comp system
- word length is defined by a comp eg 16b
port
- provides a connection between 2 devices
- each I/O is connected on an interface called a port
- each port is connected to the I/O device controller which handles interaction between CPU and I/O device
- Internal if I/O device is an integral part of the computer system
- External allows connection to peripheral I/O device
USB port
- Peripherals can connect using a USB port
- allows plug-and-play - don’t need a technician to connect devices - no skill required
- A device can be connected while the computer is switched on and automatically configured for use
- hierarchy of connections are supported (can handle 127 devices)
USB vs USB drive
- USB drive - the portable storage device
- USB is the medium by which it connects to a device
VGA port
Is a different port e.g. used for a second monitor
+High resolution screen display suitable for most display requirements
- Does not transmit audio - hence HDMI is needed
HDMI port
provide a connection to a screen and allow the transmission of high-quality video and audio
+ has audio
FDE cycle
PC points to next address
address stored in MAR
data from that address stored in the MDR
data then transferred to the CIR and decoded by the CU - the instruction is then executed and the PC increases by 1
register transfer notation
- The format is: Destination ← [source]
- destination = register
- destination ←[[MAR]] - double brackets mean its the contents of that address which is transferred to the destination
- two data operations placed on the same line separated by a semi-colon - means that the two transfers take place simultaneously
reasons fro interrupts
- fatal error in a program
- a hardware fault
- a need for I/O processing to begin
- user interaction
- a timer signal.
handling interrupts
- contents of PC and registers are stored in memory
- the appropriate ISR (Interrupt Service Routine) program is initiated by loading its start address to PC
- immediate check to see if further interrupts need handling
- further interrupts are dealt with by repeated execution of the ISR program.
- If no further interrupts, the contents of the registers are restored to CPU and program is resumed
