15 - hardware

Question 1

CISC processors

Answer 1

Complex Instruction set computer
- uses more internal instruction formats
- carries out a task with as few lines of assembly code as possible
- hardware must therefore be able to handle complex instructions
- complex instructions are converted by the process into sub instructions to carry out the operation

Question 2

2 types of processors

Answer 2

RISC
CISC

Question 3

RISC processors

Answer 3

Reduced Instruction Set Computer
- fewer built in instruction formats
- uses less complex instructions - break up the code into a number of siimple single cylce instructions
- smaller, but more optimised instructions

Question 4

CISC features

Answer 4

• many instruction formats
• more addressing modes
• multi cycle instructions
• variable length instructions
• longer execution time
• more complex decoding
• hard to pipeline
• emphasis on hardware
• uses memory unit to allow complex instructions to be carries out

Question 5

RISC features

Answer 5

• less instruction formats/ sets
• fewer addressing modes
• single cycle instructions
• fixed length instructions
• faster execution time
• uses general multi- purpose registers
• easier to pipeline
• emphasis on software
• processor chips require fewer transistors

Question 6

pipelining

Answer 6

allows several instructions to be processed simultaneously without waiting for the previous instructions to be complete
- once program A has finished the first step of execution it moves to second step while B starts step 1 etc
- needs several regsters to store each stage

Question 7

how is execution of an instruction split

Answer 7

• instruction fetch cycle
• instruction decode cycle
• operand fetch cycle
• instruction execution cycle
• writeback result process

Question 8

interrupts

Answer 8

• once th eprocessor detects it
• the program is stopped if higher priority

Question 9

interrupts with pipelining

Answer 9

• when there is an interrupt there could be multiple instructions in the pipeline
• discard all instructions except the last one in the write back stage
• apply the interrupt handler routine tp this instruction
• once done the processor restarts with the next instruction
  OR
• can store the contents of all stages in registers allowing it to be restored to its previous status

Question 10

parallel processor systems

Answer 10

• operation which allows a process to be split up and for each part to be executed by a different processor at the same time
  SISD
  SIMD
  MISD
  MIMD

Question 11

SISD

Answer 11

single instruction single data
one processor that cant handle one instruction and uses one data source
processes sequentially
doesn’t allow parallel processing

Question 12

SIMD

Answer 12

single instruction multiple data
uses many processors
each processor executes the same instruction but on different data
- array procoessors

Question 13

applications of SIMD

Answer 13

graphics cards - eg an image of 400 pixels - each processor can do the same thing to each of the different data (pixels) eg increase the brightness by the same amount at the same time
sound ssamplig
- alter a large number of items by the same amount

Question 14

MISD

Answer 14

multiple instruction single data
uses several processors - each use a different instruction over the same data source
eg the american space shuttle control system to run multiple computers at the saem time on the same data in case of failure of one or multiple of the processors

Question 15

MIMD

Answer 15

multiple instruction multiple data
uses multiple processors
each one takes instructions independently and each processor can use a separate data source
- used in multicore systems

Question 16

parallel processing

Answer 16

• processors need to be qable to communicate - data needs to be transfered between processors
• software must be capable of processing data from multiple processors at once
• faster for large volumes of independent data - dependent data is not suitbale
• overcomes the von neumann bottleneck - data is always moving between memory and processor leading to latency
• more expensive hardware

Question 17

cluster

Answer 17

a number of computers with SIMD that are networked together
each processor performs a larger pseudo parallel system acting like a super computer

Question 18

super computer

Answer 18

a powerful mainframe computer.

Question 19

massively parallel computers

Answer 19

the linking together of a number of comps effectively forming one machine with thousands of processors
- increases processing power of a ‘single machine’ massively
- different to cluster where each comp remains independent
- each processor carries out part of processing and communicates via data pathways

Question 20

de morgans laws

Answer 20

to split a not split it then change the sign between from an or to and or vice versa

Question 21

half adder

Answer 21

does binary addition on 2 bits
outputs the sum and carry
formed of a XOR outputting sum and an AND ouptuting carry
cant add more bits

Question 22

full adder

Answer 22

does binary addition on mutliple bits
joins half adders to achieve this
eg
add ABC do a half adder on AB
then another on the sum of AB and C
- the sum of that is the sum
and OR the two carries to get the carry

Question 23

combination circuits

Answer 23

output depends entirely on input eg half and full adders

Question 24

sequential circuit

Answer 24

output depends on the input from the previous output eg flip flop

Question 25

SR flip slop

Answer 25

two cross coupled NAND or NOR gates with inputs S and R and outputs Q and Qnot

Question 26

use of SR flip flop

Answer 26

as memory/ storage for one bit

Question 27

problems with SR

Answer 27

invalid S, R conditions - lead to conflicting Q and notQ - need to be avoided
if outputs dont arrive at same time can become unstable

Question 28

JK flip flop

Answer 28

overcomes problems of SR
has a clock and additionaql gates to synchronise the two inputs and provent illegal states
- when both 0 there is no change in output of Q
- if values of J or K change then Q will be the same as J
- if both = 1 then Q toggles (switches) after each clock pulse

Question 29

use of JK

Answer 29

several can produce shift registers in a comp
simple binary counter can be made by linking JK circuits

Question 30

sum of products

Answer 30

write all the places where the output is one using AND, OR, NOT

Question 31

karnaugh maps

Answer 31

always 00 01 11 10 - gray codes
- groups must be even number of 1s 1,2,4,6
- must be as large as possible
- may overlap
- final expressiosn considers the values that remain constant in the group
- can be joined as cylinders - at the edges

Question 32

simplixy Z + notZ.X

Answer 32

Z+X

Question 33

features of SISD, SIMD, MISD, MIMD

Answer 33

if its single instruction - the instructions can be performed sequentially, taking advantage of pipelining
if multiple instruction - Each processor works independently
all except SISD - parallel computers with multiple processors