4 - assembly language Flashcards

1
Q

machine code

A
  • binary code with a defined no. bits that comprise of opcode and operands
  • CPU only recognises MC (0,1s)
  • instructions contain opcode and operands (0-3)
  • different processors have different instruction sets
  • actions taken by the processor are directly controlled in MC
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2
Q

for each processor, each machine instruction must define the following

A
  • total no. bits for the whole instruction
  • the no. bits that define the opcode
  • whether the opcode occupies the MSB or LSB
  • the no. operands that are defined in the remaining bits
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3
Q

assembly language

A
  • each processor has its own MC and AL equivalent
  • AL is a low level language related to MC where opcodes are written as mnemonics and operands as character representations
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4
Q

what can you do in AL not MC

A
  • programmers can add comments
  • symbolic names for constants
  • macros (sequence of instructions that can be used more than once)
  • directives - an instruction to the assembler for how to construct a final MC eg how memory should be used
  • labels for addresses
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5
Q

macro

A

sequence of instructions that can be used more than once

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6
Q

directives

A

an instruction to the assembler for how to construct a final MC eg how memory should be used

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7
Q

assembler

A

a program used to translate AL to MC

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8
Q

op code

A
  • defines the action associated with the instruction
  • 8b
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9
Q

operand

A
  • defines data needed by instruction
  • 16b binary no.
  • usually address but for SUB and LDM it’s a value
  • no operand for IN and END instructiont
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10
Q

symbolic addressing

A
  • allows programmer to write assembly language code without worrying about where the code will be stored in memory when its run -
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11
Q

relative addressing

A
  • defines a base register from which an offset is defined
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12
Q

absolute addressing

A
  • allows programmer to specify exact addresses to use in a program
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13
Q

addressing modes

A

immediate - operand is the value to be used in the instructions
direct - the operand is the address which holds the value to be used in the instruction
indirect - the operand is an address which holds the address to be used in the instruction
indexed - the operand is an address which must be added to the value in the IX

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14
Q

two pass assembler (first pass)

A

location of addresses for forward references are identified eg the base register
- Uses a symbol table
- Reads code line by line - counts instructions as it reads so can enter the offset value in the address column
- When meets a symbolic address its name is put in the symbol table
- Corresponding address is also added so it can be identified

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15
Q

two pass assembler (second pass)

A

uses symbol table and a lookup table
- Lookup table - contains binary code for each opcode - has an entry for every opcode in the set defined for the processor

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16
Q

LDM #n

A

load n into the ACC

17
Q

LDR #n

A

load n to the IX

18
Q

LDD <address>

A

load contents of that address to the ACC

19
Q

LDI <address>

A

load the contents of the second address stored in the address to the ACC

20
Q

LDX <address>

A

add the address to the IX and load the contents of this calculated address tot he ACC

21
Q

MOV <register></register>

A

Move the contents of the accumulator to the given register

22
Q

STO <address>

A

Store the contents of ACC at the given address

23
Q

IN

A

store in the ACC the ASCII value of a character typed at the keyboard

24
Q

OUT

A

used to display on the screen the character for which the ASCII code is stored in the ACC

25
Q

JMP <address>

A

jump to the given address if a condition is met

26
Q

CMP <address>

A

Compare the contents of ACC with the contents of <address>

27
Q

CMP #n

A

Compare the contents of ACC with the number n

28
Q

CMI <address>

A

Indirect addressing. The address to be used is at the given address. Compare the contents of ACC with the contents of this second address

29
Q

JPE <address>

A

following a compare instruction, jump to <address> if the compare was True

30
Q

JPN <address>

A

Following a compare instruction, jump to <address> if the compare was False

31
Q

ADD<address>

A

Add the contents of the given address to the ACC

32
Q

ADD#n

A

Add the denary number n to the ACC

33
Q

SUB <address>

A

Subtract the contents of the given address from the ACC

34
Q

SUB #n

A

Subtract the denary number n from the ACC

35
Q

INC <register></register>

A

Add 1 to the contents of the register (ACC or IX)

36
Q

DEC <register></register>

A

Subtract 1 from the contents of the register (ACC or IX)

37
Q

LSL #n

A

where the bits in the accumulator are shifted logically n places to the left

38
Q

LSR #n

A

where the bits are shifted n places to the right.