Week 12: Block move, Block move encoding/decoding, Subroutine call/return, and summary Flashcards
The ARM block move instructions are
LDM and STM
STM does what?
Push a group of registers’ contents to memory
LDM does what?
Pop values from memory and load them to a group of registers
What is the syntax of using STM or LDM?
ADR r0, DATA
STMIA r0!, {r1 - r3, r5}
What indicates auto indexing for LDM and STM?
The ! exclamation mark:
STM r0!
LDM r0!
Arm STM and LDM instructions always store the ___ first and in _____
The lower register number in the LOWEST memory address first and the higher register number in the HIGHEST memory address first.
What do the following mean?
FD IA IB DA DB ED EA FA
FD = Full Descend IA = Increment After IB = Increment Before DA = Decrement After DB = Decrement Before ED = Empty Descend EA = Empty Ascend FA = Full Ascend
What are the load/store suffixes of the following stack types?
FD
FA
ED
EA
FD (Full Descend)
Load: IA
Store: DB
FA (Full Ascend)
Load: DA
Store: IB
ED (Empty Descend)
Load: IB
Store: DA
EA (Empty Ascend)
Load: DB
Store: IA
FD, FA, ED, and EA are examples of
Pseudo notations
The difference between ARM’s block move instructions are:
The direction (up/down) and whether the pointer points to free memory or not
How does the “register list” portion of a block move instruction work?
From right to left, every bit that is a 1 is included in the register list from r0 - r15
What is a subroutine?
A set of instructions that may be repeatedly called by a program to do a given function
What are the two main characteristics in any subroutine?
- A subroutine can be called from anywhere in the program
2. Once the subroutine is completed, it should return to the instruction directly AFTER the subroutine calling location
What is ARM’s support for Subroutines?
BL, branch with link automatically saves the return address in register 14
BL does what on top of branching?
The processor also copies the return address into R14 (the link register)