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CS2208 > Chapter 3: Assembler Info > Flashcards

Chapter 3: Assembler Info Flashcards

1
Q

The code to set up an area is:

A

AREA nameOfCode, CODE, READONLY
ENTRY

{code}

END

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2
Q

{label} DCD v. expr {, v. expr}

Does what?

A

set up one or more 32-bit (4 byte) constant in memory. MUST START AT A MULTIPLE OF 4 ADDRESS

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3
Q

{label} DCW v. expr {, v. expr}

Does what?

A

set up one or more 16-bit (2 byte) constant in memory. MUST START AT A MULTIPLE OF 2 (EVEN) ADDRESS

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4
Q

{label} DCB v. expr {, v. expr}

Does what?

A

set up one or more 8-bit (1 byte) constant in memory. CAN START ANYWHERE

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5
Q

{label} SPACE size (in bytes) expr

Does what?

A

reserve a zeroed block of memory

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6
Q

ALIGN

Does what?

A

ensures that the next data item is correctly aligned on a 32-bit boundary (start at a multiple of 4)

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7
Q

If no align is included…

A

the assembler will automatically insert bytes with zeros to ensure appropriate boundary alignment

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8
Q

DCD, DCW, and DCB tell the assembler to:

A
  • Reserve one or more 32-bit, 16-bit, or 8-bit blocks of storage in memory
  • Load whatever values to the right of DCD, DCW, or DCB into the locations
  • Advance the location-counter by one or more four, two, or one bytes so that the next instruction will be put in the next place in memory
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9
Q

What is the location-counter?

A

a variable inside the assembler to keep track of memory locations during assembling a program, whereas the PC is a register to keep track of the next instruction to be executed

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10
Q

What is the difference between the PC and the location-counter?

A

Location-Counter is a variable inside the assembler to keep track of memory locations during assembling a program, whereas the PC is a register to keep track of the next instruction to be executed

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11
Q

ALIGN is an example of

A

explicit alignment

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12
Q

Strings must

A

BE ALLOCATED WITH DCB AND DOUBLE QUOTES “ ”

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13
Q

Single characters must

A

ALSO ALLOCATED WITH DCB BUT WITH SINGLE QUOTES INSTEAD ‘ ‘

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14
Q

& can represent

A

DCD if used in place of DCD (P1 & 0x12345678)

0x if used after a DCD, DCW, or DCB (Strg2 = “X2”, &0C, &0A )

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15
Q

= can represent

A

DCB if used in place of DCB (Strg2 = “X2”, &0C, &0A )

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16
Q

% represents

A

SPACE

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17
Q

A pseudo instruction is

A

an operation the programmer can use when writing code

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18
Q

Pseudo instructions do not

A

Have machine language equivalents

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19
Q

MOV cannot

A

move anything longer than 16-bits long (FFFF) is maximum

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20
Q

Instead of using MOV for a 17+ bit literal, use

A

LDR r0, = 0xFFFFFF pseudo instruction

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21
Q

LDR r0, = 0xFFFFFF pseudo instruction

Does what?

A

Loads FFFFFF into r0

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22
Q

ADR r0, label

Does what?

A

loads a 32-bit address into a register

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23
Q

What is the difference between ADD and ADC?

A

ADD and ADDS: adds two 32-bit values

ADC and ADCS: adds two 32-bit values together with carry

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24
Q

ADDS and ADCS update which flags?

A

ADDS and ADCS update ALL FLAGS

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25
Q

What is the difference between SUB and RSB?

A

SUB: SUB r1,r2,r3 means subtract r3 from r2 and store in r1

RSB: RSB r1,r2,r3 means subtract r2 from r3 and store in r1
RSB can be used to subtract from a constant:
RSB r1, r2, #10
RSB can be shortened: RSB r1, #5 means RSB r1, r1, #5

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26
Q

SUBS and RSBS update which flags?

A

SUBS and RSBS update ALL FLAGS

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27
Q

NEG does what?

A

NEG (Negation): is a pseudo instruction to subtract a number from zero

NEG only has two operands and CANNOT be shortened

NEG r1, r2 is equal to RSB r1, r2, #0

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28
Q

NEG r1, r2 is equal to…

A

RSB r1, r2, #0

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29
Q

What is the difference between MOV and MVN?

A

MOV: MOV r0, r1 moves contents of r0 into r1

MVN: MOV r0, r1 moves the logical complement of r1 (every 1 to 0 and every 0 to 1) into r0

30
Q

MOVS and MVNS update which flags?

A

MOVS and MVNS update the N, Z, and C flags, NOT the V flag

31
Q

What does MUL do exactly?

A

MUL rd, rm, rs multiplies rm by rs and stores the lower-order 32-bits of the 64-bit operation (cannot be shortened to 2 operands)
CANNOT use the same register for rd and rm
ARM does not allow multiplying by a constant

32
Q

Does arm support multiplying by a constant?

A

No

33
Q

For multiplying, can you use the same register for destination and register source 1?

A

No

34
Q

For multiplying, can you use the same register for destination and register source 2?

A

Yes

35
Q

MLA does what?

A

MLA: MLA rd, rm, rs, rn = (rm x rs) + rn. Cannot be shortened to three operands

36
Q

MULS and MLAS update which flags?

A

MULS and MLAS update the N and Z flags, but CORRUPT the C and V flags

37
Q

MVN does what to 11001010?

A

will not EVERY bit, INCLUDING the leading zeros:

11111111111111111111111100110101

38
Q

ANDS, ORRS, EORS, and MVNS update which flags?

A

ANDS, ORRS, EORS, and MVNS update the N, Z, and C flags, NOT the V flag

39
Q

What does the 2_ sign prefix indicate?

A

Binary

40
Q

What does the 8_ sign prefix indicate?

A

Octal

41
Q

What does the 0x sign prefix indicate?

A

Hexadecimal

42
Q

What does the & sign prefix indicate?

A

Hexadecimal

43
Q

BIC does what?

A

BIC (bit clear) ANDs its first operand with the complement of the second

Example: suppose we have r1 = 10101010 and r2 = 00001111.

The instruction BIC r0, r1, r2 yield 10100000

44
Q

BICS updates which flags?

A

BICS updates the N, Z, and C flags, NOT the V flag

45
Q

What is the difference between implicit and explicit updating of flags?

A

Example of implicit updates for the condition flags: SUBS r1,r1,r2

Example of explicit updates for the condition flags CMP r1,r2

46
Q

What does CMP r1, r2 do?

A

evaluates r1 - r2 and sets the flags without storing the result

47
Q

What does TEQ r1, r2 do?

A

Tests whether r1 is equal to r2

similar to EORS, except that the result is discarded

48
Q

What does TST r1, r2 do?

A

TST (test instruction) Compares two operands by ANDing them together and update flags. Usually used to test individual bits; TST r0, #2_00100000 ;AND r0 with 00100000 to test bit 5

49
Q

What does CMN r1, r2 do?

A

CMN (compare negative instruction). 2’s complements the second operand before performing the comparison: CMN r1, r2 ; evaluates [r1] – (-[r2])

50
Q

What is a logical shift?

A

Insert a 0 in the vacated positions

51
Q

What is an arithmetic shift?

A

replace the sign bit during a right shift

52
Q

What is a circular shift?

A

the bit shifted out of one end is places into the other

53
Q

What is a Circular shifts through carry?

A

Include the carry bit in the shift path

54
Q

Does arm have any explicit shift operation?

A

No

55
Q

What can ARM do with shift operations?

A

ARM can combine shifting operations with other data processing operations where the second operand is allowed to be shifted BEFORE it is used

ADD r0,r1,r2,LSL #1 ;

[r0] < [r1] + [r2] × 2

56
Q

LSL r3, r3, #1 is equal to

A

MOV r3, r3, LSL #1 which is equal to LSL r3, #1

57
Q

MOV r3, r3, LSL #1 is equal to

A

LSL r3, r3, #1 which is equal to LSL r3, #1

58
Q

LSL is a

A

pseudo instruction

59
Q

ARM supports both ____ and ____ shifts

A

Static and dynamic

60
Q

For LSL, allowable values are from

A

0 to #31 (32 different values)

61
Q

For LSR, allowable values are from

A

1 to #32 (32 different values)

62
Q

For ASR, allowable values are from

A

1 to #32 (32 different values)

63
Q

For ROR, allowable values are from

A

1 to #31 (31 different values)

64
Q

For dynamic shifts, the following mean what?

MOV r4,r3,LSL r2

LSL r4,r3,r2

A

MOV r4,r3,LSL r2 ;
[r4] [r3] × 2^r2

LSL r4,r3,r2
;[r4] [r3] × 2^r2

65
Q

If, for a shift operation, the value of the register storing the dynamic amount is greater than 32, what will be stored in the destination?

A

Zeros

66
Q

What are the five shift types supported by ARM?

A

LSL logical shift left

LSR logical shift right

ASR arithmetic shift right

ROR rotate right

RRX rotate right through carry (one shift)

67
Q

Arithmetic shift left is the same as

A

a logical shift left

68
Q

Rotate left through carry can be implement by

A

ADCS r0,r0,r0 ; add r0 to r0 with carry and set the flags

The instruction means r0 + r0 + C, i.e., 2 × r0 + C

69
Q

What are the two ways of loading addresses into a register?

A

LDR r0, =PPP

ADR r0, PPP

70
Q

What is the order of the data definition if it were to be negative, and hex? Octal?

A

-8_15 = octal

#-0xFC = hex
Starts with the # sign
Followed by the optional positive or negative sign
Followed by an optional base sign
Followed by the number

CS2208 (12 decks)

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