Sequential Logic Design Flashcards
In general, what do the outputs of a digital system depend on?
The outputs of a digital system depend on the current inputs and the history of the input up to the current time.
What is a defining attribute of sequential logic?
Sequential logic has storage (memory)
What is the purpose of storage elements in sequential logic?
Storage elements maintain the state of the circuit
List typical sequential circuits
- Counters
- Memories
- Shift registers
- Finite State Machines (FSM)
What are the main two types of sequential circuits?
- Asynchronous
- Synchronous
What is meant by an asychronous sequential circuit?
State transitions are triggered by primary input changes.
When the input changes, the circuit will react to the change without requiring a clock event.
How is an asynchronous sequential circuit implemented?
An asychronous circuit require delays, this is implemented using special delay elements or simply relies on propagation delays in the combinational logic elements
What is meant by a synchronous circuit?
State transitions are triggered by regular clock events.
We can say that changes in the state of memory elements are synchronised by a clock signal.
What is a D-type latch?
A variation of the S-R latch which is provided a delay by the introduction of D.
–EDIT–
What are the two models for a FSM?
- Mealy machine
- Moore machine
What is a Mealy machine?
A FSM in which the outpu depends on inputs and the current state.
What is a Moore machine?
A FSM in which the output depends only on the current state.
Describe the layout of a Mealy machine.
- The states are contained in circles.
- The arrows show how the state changes.
- Each state will have arguments that cover all the possible arguments that may occur
- The numbers shown by the arrows represent inputs/outputs (e.g. 1/0 = input 1/output 0)
How is a Mealy machine implemented in VHDL?
- Input and output ports, and their types are defined in entity mealy_machine
- In the architecture we define the two states as type state_type (state1, state2)
- In the architecture we define the signals current_state and next_state: state_type
- We define a sequential part which defines default value and the clock change-state change control
- Begin architecture - a case statement is used to define what we want to happen in each state
Describe the layout of a Moore machine
- The states and their outputs are defined in circles
- e.g. when a/0, b/1 = statea output0, stateb output1
- Arrows show the combinations of inputs but not the output unlike Mealy machine