Hazards Flashcards

1
Q

What is a static hazard?

A

One input variable changes, the output changes momentarily when it shouldn’t.

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2
Q

What is a static-0 hazard?

A

An error which occurs when an output which should be 0, momentarily goes to 1 due to a glitch.

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3
Q

How can we represent a static-0 hazard using a gate level implementation?

A

An AND circuit in which one input contains a NOT gate. A NOR circuit in which on input contains a NOT gate

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4
Q

What is a static-1 error?

A

An error which occurs when an output which should be 1, momentarily goes to 0 due to a glitch.

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5
Q

What does the truth table look like for a 2-input AND gate?

A
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6
Q

What does the truth table look like for a 2-input NOR gate?

A
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7
Q

The AND gate is equivalent to:

A

logic multiplication

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8
Q

The OR gate is equivalent to:

A

logic sum

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9
Q

How can we represent a static-1 hazard using a gate level implementation?

A

An OR circuit in which one of the inputs has a NOT gate.

A NAND circuit in which one of inputs has a NOT gate.

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10
Q

How can we detect a static-0 hazard from an expression?

A

Expand the function as much as possible.

Determine the combination of the values of the variables that reduce the circuit to XX’

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11
Q

How can we detect a static-1 hazard from an expression?

A

Expand the expression as much as possible.

Determin the combination of variable that lead to the function X + X’

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12
Q

How can we detect a static-0 error from a K-map?

A

A static-0 error can be identified by two logically adjacent maxterms (0’s).

  1. Draw the K-map
  2. Group all 0’s
  3. Identify any pairs of 0’s which exist in two groups i.e. there is an overlap
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13
Q

How can we detect a static-1 hazard from a K-map?

A

A static hazard will occur when there are two logically adjacent essential prime implicants.

  1. Circle all the prime implicants which are adjacent sum terms = 1
  2. If there exists any pair of cells with 1’s are not contained in one group, i.e there is an overlap. This means there will be a static-1 hazard
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14
Q

What is meant my logical adjacency?

A

Only one variable changes between them when we from one to another.

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15
Q

How do we design a hazard free circuit?

A

By eliminating the XX’ and X + X’ hazards that occur.

We can do this by forming the function, determining the values of the combination of variables that cause the error and then including these components in the SOP or POS.

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