Logic Minimisation Flashcards

1
Q

Name the ways that cost can be evaluated in combinational logic.

A
Number of IC packages
Number of gates
Silicon area (VLSI design)
Propagation delay
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2
Q

What is the effect of minimising the number of gates in a combinational logic function?

A

Reduces cost

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3
Q

How can we minimise the number of gates in a logic function?

A
  1. By minimising the number of first-level gates
  2. By minimising the number of inputs on each first-level gate.
  3. By minimising the number of inputs on the second-level gate. This is actually a side effect of the first reduction.
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4
Q

What is the name for a boolean function expressed in the form, F = A’BC + AC

A

Canonical form

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5
Q

What is SOP?

A

Sum of Products - form of representation of a boolean expression involving minterms

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6
Q

What is POS?

A

Product of Sums - Technique of generating a boolean expression involving maxterms

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7
Q

What is the order of implementation for a SOP?

A

OR gate is employed after the AND gate

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8
Q

What is the order of implementation for a POS?

A
  1. OR gate - sum terms

2. AND gate - gives product

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9
Q

What is the gate equivalent of summing two logic values?

A

OR gate

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10
Q

What is the gate equivalent of multiplying two values?

A

AND gate

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11
Q

How is the SOP obtained?

A

By adding corresponding product terms

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12
Q

How is the POS obtained?

A

Multiplying the relevant sum terms

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13
Q

What is combinational logic?

A

Logic in which the outputs depend only on current inputs

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14
Q

What is a prime implicant?

A

A group of adjacent 1’s (minterms) in a K-map

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15
Q

What are essential prime implicants?

A

There are subgroups which cover at least one minterm that can’t be covered by another (do not overlap). They always appear in the final solution.

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16
Q

What is a map entered variable?

A

A map entered variable (MEV) represents values of a function in terms of its variable, this is useful in function with more than 4 inputs.

17
Q

How do we minimise a two-level SOP which includes MEV’s?

A
  1. Ignore MEV’s and loop 1’s and X’s. Find the expression, F1
  2. For each MEV loop only that MEV. E.g A’ looped separate to A and other letters. Find expression, F2,
  3. Combine F1 and F2.