Pipelining Flashcards

1
Q

DEFINE: Pipelining.

A

The process of breaking down tasks into smaller pieces in order to enable parallelism at a micro level.

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2
Q

DEFINE: Latency.

A

The time it takes to complete a process, start to finish.

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3
Q

DEFINE: Throughput.

A

The number of tasks a system can complete per unit of time.

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4
Q

TRUE/FALSE: Optimizing for Throughput is always valued over Latency.

A

FALSE. Some applications value Latency more, such as airbags.

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5
Q

For combinational circuits, what is Latency measured with?

A

Propagation delay.

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6
Q

For combinational circuits, what is Throughput measured with?

A

1 / Propagation delay.

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7
Q

What feature do Pipelined Circuits most prominently display?

A

Registers at the end of ALU’s, storing the output.

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8
Q

How many clock cycles does a 4-stage pipeline take to complete?

A

Minimally, 4.

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9
Q

Why is Pipelining performed?

A

To get the most use out of every microarchitectural component by avoiding idle time, thereby maximizing throughput.

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10
Q

TRUE/FALSE: Pipelining circuits slightly increase Latency but also increase Throughput.

A

TRUE.

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11
Q

Given a 4-stage pipeline, how many registers will a path hit?

A

4.

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12
Q

TRUE/FALSE: More pipelines, given infinite silicon and infinite money, are always better.

A

FALSE. Diminishing returns occur when having to delay by many stages.

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