CPU Structure, Function and Performance Flashcards
what happens in the fetch
data and instructions are fetched from main memory
what is the address bus
this transmits memory addresses specifying where data is to be sent to
what is a data bus
used or transporting data and instructions between components
what happens in the decode stage
this is where the the fetched instruction is decoded
execute phase
this is where the decoded instruction is executed
control units
controls the activities of the CPU and the flow of data
what does the clock speed mean
time taken for one clock cycle to complete
what does CPU cores allow u to do
allows multiple instructions to be processed at the same time
what is pipelining
where the output of one stage is the input for another
what is the Harvard architecture
where the programs instructions are stored separately in memory
what are the disadvantages of the Harvard architecture
memory is not dynamic as one half is used for data and the other for instruction
what are the advantages of the Harvard architecture
quicker execution as data and instructions can be fetched in parallel
what is CISC
complex instruction set computers, can execute many instructions in only one line of code
what is RISC
reduced instruction set computers, can only execute one line of code at a time
what is an example of a parallel system
a GPU it has lots of different processors which work in parallel to complete repetitive tasks