CO1 WEEK 4 PARTS OF CPU Flashcards
What are transistors?
- Connected by busses
- Tiny electronic switch
- Can be turned of by applying voltage to their terminals
- Arranging transistors in different ways = logic gates and circuits that preform operations
- moore’s law=number of transistors double each year
What are processors?
Processors speed
- clock speed =instructions per second
- cpu requires fixed amount of clock cycles
- Faster clock speed more instructions
What are the main parts of the CPU?
-Control unit
-ALU
-Registers
What is the CU?
Co ordinates the activity of all processor components
- decided instruction’s received
- manages the phases of FDE
What is the ALU?
carries out calculations and logic
- includes eg +-x,divide
-logic <>
- Stored in Accumulator
What are registers and state their function?
- Small areas of volatile memory in cpu
- temporary store for data
- very fast
- when data processed, values shifted in and out
What are the names of the registers?
PC
-CIR
-MAR
-MDR
-ACC
What is the PC?
Stores the address of memory location that data is about to be written to or read from.
What is the MAR?
- Temporarily stores address of memory location of data
Eg address of next instruction (copied from PC)
What is MDR/MBR?
- Contains the contents of the memory address specified by MAR
What is the CIR?
stores the instruction that is currently being decoded or executed or copied from MDR
- split into 2
first part is Operation code which decoded for CU
the second part is data or address of data which sent to MAR
What is the ACC?
holds data while it’s being processed
-stores all input/output as well as results of calculations
What are the key parts of Von Neumann architecture ?
single control unit
- linear
- program and data stored together
- same bus for data and instruction
- FDE used
- fetches data or instruction one at a time
What are the probs with VN architecture?
Shared memory- can cause corruptions
- memory leaks
- bottle necks
- Fetch rate
What is the key Parts of Harvard architecture?
Units dif sizes better use of memory
- different word lengths for dif units
- Instructions more likely read only
- multiple cores on one task