Chapter 1 Flashcards
Basic Concepts and Computer Evolution
Define
Computer Architecture
Attributes of a system visible to the programmer and have a direct impact on logical execution of a program.
I/O mechanisms
Architectural decision whether comp will have multiply instruction
Define
Computer organization
The operational units and their interconnections that realize the architectural specifications. Includes hardware details transparent to programmer.
Control signals, interfaces between computer and peripherals , memory technology used. Decides how instructions will be implemented
List
4 basic functions computer can perform
Data processing
Data storage
Data movement
Control
List
4 main structural components of computer
CPU
Main memory
I/O
System interconnection
List
Major structural components of CPU
Control Unit
Arithmetic and logic unit
Registers
CPU Interconnection
Definition of Registers
Provides storage internal to the CPU
List
Multicore Computer Structure
CPU
Core
Processor
Definition of Core
An individual processing unit on a processor chip; may be equivalent in functionality to CPU on a single-CPU system.
Definition of Processor
A physical piece of silicon containing one or more cores. Is the computer component that interprets and executes instructions
Define
Cache memory
Multiple layers of memory between the processor and main memory. Greater performance increase if use multiple levels, with level 1 closest to the core and level (n) furthest.
Define
Memory Buffer Register (MBR)
Contains a word to be stored in memory or sent to I/O unit, or is used to receive a word from memory or I/O.
Define
Memory Address Register (MAR)
Specifies the address in memory of the word to be written from or read into the MBR.
Definition of Word
A unit of data of a defined bit length that can be addressed and moved between storage and the computer processor.
Define
Instruction Register (IR)
Contains the 8-bit opcode instruction bit being executed.
Define
Instruction Buffer Register (IBR)
Employed to temporarily hold the right-hand instruction from a word in memory.
Definition
Program Counter (PC)
Contains the address of the next instruction pair to be fetched from memory.
Define
Accumulator (AC) and Multiplier Quotient (MQ)
Employed to temporarily hold operands and results of ALU operations.
Gate
Device that implements a single boolean logic function.
Memory Cell
Device that can store one bit of data; that is, can be in one stable state at a time.
4 basic functions of computer related to gates and memory cells
Data storage provided by memory cells
Data processing provided by gates
Data movement is the paths among components that are used to move data from memory to memory and from memory through gates to memory
Control: the paths can carry control signals
Transistors
The fundamental building block of digital circuits, used to construct processors, memory cells, and other digital logic devices
Moore’s Law
Number of transistors that can be put on a single chip was doubling every year.
Embedded Systems
The use of electronics software within a product.
The 2 general approaches for developing an embedded OS
- Take existing OS and adapt it for the embedded application.
- Design and implement an OS intended solely for embedded use.
Define
Application processors
Defined by processor’s ability to execute complex OS’s. General-purpose in nature, like the smartphone.
Define
Dedicated processors
Dedicated to one or a small number of specific tasks required by host device. Reduced size and cost.
Deeply Embedded Systems
Dedicated, single-purpose devices that detect something in the environment, perform a basic level of processing, and do something with the results.
ARM
Process architecture evolved from RISC design principles and is used in embedded systems. Advanced RISC Machine.
RISC
Reduced Instruction Set Computer
Define
ISU (Instruction Sequence Unit)
Part of internal structure of single core
Determines the sequence in which instructions are executed in superscaler architecture. Tracks register names, out-of-order instruction dependency, and handling of instruction resource dispatch
Part of internal structure of single core
Define
IFB (instruction fetch and branch) and ICM (instruction cache and merge)
Part of internal structure of single core
Contain 128kb instruction cache, branch prediction logic, instruction fetch controls, and buffers.
Part of internal structure of single core
Define
IDU (instruction decode unit)
Part of internal structure of single core
Fed from the IFU buffers, and is responsible for the parsing and decoding of all z/ Architecture operation codes.
Part of internal structure of single core
Define
LSU (load-store unit)
Part of internal structure of single core
Contains 96kb L1 data cache, manages data traffic btwn L2 data cache and the functional execution units. Responsible for handling all types of operand access of all lengths, modes, and formats
Define
XU (translation unit)
Part of internal structure of single core
Translates logical addresses from instructions into physical address in main memory. Also contains a translation lookaside buffer (TLB) used to speed up memory access.
Part of internal structure of single core
Define
PC (core pervasive unit)
Part of internal structure of single core
Used for instrumentation and error collection
Part of internal structure of single core
Define
FXU (fixed-point unit)
Part of internal structure of single core
Executes fixed-point arithmetic operations
Part of internal structure of single core
Define
VFU (vector and floating-point units)
Part of internal structure of single core
Handles binary, hex, and decimal floats and operations performed on them. Also handles vector operations.
Part of internal structure of single core
Define
RU (recovery unit)
Part of internal structure of single core
Keeps a copy of complete state of system that includes all registers, collects hardware fault signals, and manages hardware recovery actions.
Part of internal structure of single core
Define
COP (dedicated co-processor)
Part of internal structure of single core
Responsible for data compression and encryption functions for each core
Part of internal structure of single core
