1.1 structure of the CPU Flashcards
list of all regsiters
MAR
MDR
CIR
Program counter
accumulator
what is a register
temporary small storage
used for a specific purpose
faster than RAM
used in FDE cycle
what does the control unit do
the control unit decodes instructions
sends signals to control movement of data
uses control buses
what are the three buses
address bus
control bus
data bus
what does the address bus do
sends the address of the address in the main memory
what does the control bus
transmits control signals
essentially tells the the CPU if data is being written to or read from memory
what does the address bus do
used by the CPU to locate the physical address in the MAR
what is a bus
busses consist of a series of connectors that transfer signals between internal components
signals typically 16 32 64 bits
what is the CIR
current instriction register if data sent to the MDR is an instruction and not data then copied over to the current instruction register
what is the general purpose register
contains any number overflows
Characteristics of Von neumann
one control unit
one bus for both instructions and data
single processor (can have multiple cores)
one instruction at a time
program must be loaded into main memory to be executed
instructions and data stored together
characteristics of Harvard arhchitecture
instructions and data in seperate memory locations
two seperate buses for data and instructions
can fetch instructions and data at the same time