109 Flashcards
What is a counter?
> They increase in value by 1
How are counters built?
> With flip-flops
> A 4 bit counter requires 4 flip-flops
How is a timer made? How are they applied?
> Using counters
> Increase on every clock cycle
How can a timer be used to calculate the time passed?
> If we know the clock frequency then we can measure how many clocks have passed to work out time
What is a JK Flip-flop?
They are like a flip flop except they toggle the current value being stored
What are the inputs and outputs of a JK flip-flop?
> J > K > Clk > Q > Q(NOT)
What is the truth table for a JK Flip-flop
CLK J K Q ^ 0 0 Q(t-1) ^ 0 1 0 ^ 1 0 1 ^ 1 1 [NOT] Q(t-1) It flips the value stored
What is a Synchronous counter and how is it implemented?
> This is a binary counter which increased based off the clock signal.
Made using JK Flip-flops
In a binary counter, when is the next bit flipped?
When all the previous bits are 1
How is the least significant bit clocked?
With the clock cycle input
How is a Synchronous counter made from JK flip-flops and logic gates (for a 4 bit counter)?
> There are 4 JK flip-flops in a line
Each has the same clock signal as its input
JK1 has both its J and K inputs set at 1
The output of the JK1 goes into the J and K input for JK2
An AND gate is placed beside the JK2 with one of its input from the output of JK1 and the output of JK2.
The result of the AND gate goes into both the J and K of JK3
Another AND gate is placed beside JK3 with one of its inputs being the result of the first AND gate and the other from the output of JK3.
The result fo this second AND gate goes into both the J and K inputs of JK4
The outputs of each JK represent the bits of the counter
What is a good application of a counter?
> Frequency divider
What is a frequency divider?
> This divides the frequency by 2^x
> This is good because we can make very accurate clocks using quartz crystals.
How are quartz crystals divided with a frequency divider?
> They vibrate at 32,768Hz
> A frequency divider with 15 stages can produce a very accurate clock with a frequency of 1 Hz
How is the clock frequency increased?
> An internal phase-lock loop is used to multiply the base frequency
What is the issue with a high frequency clock counter?
A 32 bit counter is not enough for even a 10 MHz clock frequency and will not last long so a larger counter is needed
What is a watchdog timer?
> This prevents a computer from becoming stuck and recover from a malfunction
This is a timer which counts clock cycles
When it overflows it resets the computer.
To stop it always resetting the computer program needs to continuously reset the clock to 0 (referred to as petting the dog)
What is an important situation for a watchdog timer?
For flight essential computers in space probes
What is a UART?
> Universal Asynchronous receiver transmitter
> Used to send data between two devices 1 bit at a time
How is a UART synchronised and why?
> There is no clock speed between them
So both devices need to know the rate at which data is being transferred
Timers are used to send data between the devices at the correct times
What is pulse width modulation?
> Turning on and off very quickly to control analogue devices
Used to digitally control the speed of motors
What is the duty cycle?
The ratio of the time on and off for a PWM signal
How is a duty cycle for PWM implemented?
> When the signal is high, a counter is used to count up to a number and turn off the signal.
Then it repeats over a standard amount of time
What is used to control the times of a PWM signal?
The Match register
