107 Flashcards
What is sequential logic?
This is a logic circuit which depends on both the current input and previous values of input
What is combinational logic?
This is a logic circuit which depends on only the current inputs
What is a clock siganl
It is a square wave electrical signal with a frequency called the clock frequency
When does a circuit with a clock cycle update?
On a clock edge
What are the two clock edges?
> Rising edge / Positive edge
> Falling edge / Negative edge
What type of circuit does not use a clock signal?
This is an asynchronous circuit
How is a positive clock represented on a logic element?
A triangle into the circuit element.
Looks like: =>
How is a negative clock represented on a logic element?
A triangle with a dot into the circuit element.
Looks like: =°>
What is a d-latch? (4)
> This is a fundamental sequential logic circuit component
It is bistable
When the enable gate is powered the output will take the value of the input
When the enable gate is not powered the output will hold its value
What is an Astable Multivibrator?
A component that oscillates between two values
What is a monostable multivibrator?
> A component that can be put into a state but has a single stable state and will return to that stable state after a while of being in a different state
Also called a one-shot
What is a D-Flip-Flop? (3)
> A data/delay flip flop
The output is delayed by a lock cycle compared to the change of input
Constructed from D-Latches
What are the inputs and outputs?
Inputs > D - Data > E - Enable Outputs > Q - Stored Value > NotQ - Inverted stored value
What is the truth table for a D-latch?
E D Q Qnot 0 0 NC NC 0 1 NC NC 1 0 0 1 1 1 1 0
NC - No change
What is the circuit for a dlatch?
> 4 NAND logic gates (A topleft, B topright ,C bottomleft, D bottomright) > Data goes into A > Enable goes into C and A > Output of A goes into C > Output of A goes into B > Output of C goes into D > Output of B goes into D > Output of D goes into B > Output of B is Q
How is a D-flop-flop constructed form D-Latches?
> Data goes into the first master d-Latch and the output goes into the second slave d-latch.
The enable pin is connected into the second d-latch and is inverted with a not gate and goes into the fist d-latch
What is the sequential process of a D-Flip-Flop?
> When the clock is low, the master FF is transparent and passes D to Q but the slave is locked
The value of D is stored in the master but it cannot propagate to the output Q because the slave is locked
When the clock goes high, the master locks and the slave unlocks and becomes transparent
The value of in the master Q is passed onto the output Q
How can multiple bits be stored?
By grouping D-Flip-Flops
What is a register and what is its property?
> Temporary high speed memory
> Fast read and write speeds
Why is the size of a register often small?
Because it is expensive
Where is the register found?
Inside the CPU
What are the two different methods to writing to a register and what does each type mean?
Serial - Writing a single bit at a time
Parallel - Writing all the bits in one go
What is Parallel-in/Parallel-out?
> All the FF’s are in parrallel
Each FF shares the same clock signal and keeps the operations synchronous
Each bit from a data bus is fed into an individual FF
All data is written in a single clock cycle
What is Serial-in/Serial-out?
> FF are put in series with each other
As the clock changes, bits are shifted along to the next flip flop. This takes time as one bit is loaded per clock cycle.
What is a shift register?
These shift data to the left or right
Where are shift registers used?
> UARTS
> UARTS are Universal Asynchronous receiver transmitter
What happens when you shift a binary number to the left or to the right?
> Left - Multiplies by 2
> Right - Divides by 2
How does a shift register function?
> Values are loaded in parallel
> Values are shifted serially
What is it called when values are loaded in parallel and shifted serially?
Parallel to serial conversion
How can a parallel and shift multipurpose register be controlled?
With an additional control bit to decide the shift of parallel function. This controls a multiplexer.
