104

Question 1

What values can boolean algebra take?

Answer 1

1 or 0

Question 2

What is boolean addition?

Answer 2

> OR
Sum = 1 when any of the literals are 1
Sum = 0 when all the literals are 0

Question 3

What is boolean multiplication?

Answer 3

> AND
Product = 1 when all literals are 1
Product = 0 when any literals are 0

Question 4

What are the zero and unit rules?

Answer 4

> A.0 = 0
A.1 = A
A+1 = 1
A+0 = A

Question 5

What are the complement relations?

Answer 5

> A.A ̅=0
A+A ̅=1
A= =A [double complemented A = A]

Question 6

What are the Idempotence rules?

Answer 6

> A.A = A

> A+A = A

Question 7

What are the communtative laws?

Answer 7

> A+B=B+A

> A.B = B.A

Question 8

What are the absorption rules?

Answer 8

> A + A.B = A
A.(A+B) = A
A+ A ̅.B=A+B

Question 9

What are the distributive laws?

Answer 9

> A.(B + C) = A.B + A.C

> A + B.C = (A + B).(A + C)

Question 10

What are the associative laws?

Answer 10

> A + B + C = (A + B) + C = A + (B + C)

> A.B.C = (A.B).C = A.(B.C)

Question 11

What are De Morgan’s Theorems?

Answer 11

> (A+B) ̅= A ̅.B ̅

> (A.B) ̅= A ̅+ B ̅

Question 12

What is the rule of De Morgan’s Theorems?

Answer 12

Break the line and change the sign

Question 13

What is a multi-input gate?

Answer 13

Instead of writing out several gates in a row, we often have a gate with multiple inputs.

Question 14

What are the two De Morgan’s theorems in words?

Answer 14

> The complement of a product of variable is equal to the sum of the complemented variables.
The compliment of a sum of variables is equal to the product of the complemented variables

Question 15

What is circuit minimisation?

Answer 15

This is the way of simplifying expressions to minimise operations

Question 16

Why are NAND gates special?

Answer 16

All other primitive logic gates can me made from NAND gates

Question 17

How can a NOT gate be made from NAND gates?

Answer 17

The input is the same for both inputs of the NAND gate

Question 18

How can a AND gate be made from NAND gates?

Answer 18

A NAND gate where the output goes into both inputs of another NAND gate

Question 19

How can a OR gate be made from NAND gates?

Answer 19

> y=(a ̅.b ̅ ) ̅

> Each input goes into both inputs of separate NAND gates. Each output of each NAND gate goes into another NAND gate

Question 20

How can a NOR gate be made from NAND gates?

Answer 20

> Each input goes into both inputs of separate NAND gates. Each output of each NAND gate goes into another NAND gate. The output of this gate goes into both inputs of another NAND gate
Look in Notes to see what it looks like

Question 21

How can an XOR gate be made from NAND gates?

Answer 21

> See notes

Question 22

What does CMOS Stand for?

Answer 22

Complementary Metal-oxide semiconductor

Question 23

What is CMOS?

Answer 23

> A technology used to make MOSFETS

> Made using semiconductors

Question 24

What type of semiconductor is used in CMOS technology and what has happened to it?

Answer 24

> n-type: Electrons are added to make them more negatively charge
p-type: Holes are added to make it more positively charged

Question 25

What are the two types of MOSFETS made from CMOS?

Answer 25

> n-channel MOSFETs (n-FET) | > p-channel MOSFETs (p-FET)

Question 26

What happens when n-type and p-type silicone is put together?

Answer 26

> A region between them called the depletion region is formed > This region is nonconductive

Question 27

What happens in a n-fet?

Answer 27

> When a positive charge is applied to the gate, it attracts electrons and causes the depletion region to conduct electricity and join the source and drain together

Question 28

What happens in a p-fet?

Answer 28

When a negative charge is applied to gate, it attracts holes and causes the depletion region to conduct electricity and join the source and drain together

Question 29

What is the structure of n-fet?

Answer 29

The negative silicone is on the top and the positive silicone is on the bottom

Question 30

What is the structure of a p-fet?

Answer 30

The positive silicone is on the top and the positive silicone is on the bottom

Question 31

How are gates made?

Answer 31

Using different transistors in different combinations

Question 32

How are NOT gates made from transistors?

Answer 32

> The input is connected to 2 transistors in parallel, one p-type (source connected to Vdd) and one n-type (source connected to Vss) > The drain of both resistors are connected to the output

Question 33

What is the difference between Vdd and Vss?

Answer 33

Vdd is positive (1) and Vss is negative (0)

Question 34

How are NAND gates made from transistors?

Answer 34

> See Notes

Question 35

What can be said about power efficiency of CMOS?

Answer 35

> There is no direct path between Vdd and Vss when transistors are static > This reduces power consumption > Power can pass between the two when the transistors switch

Question 36

PRACTIVE KARNAUGH MAPS

Answer 36

DO IT

Question 37

What is gray code?

Answer 37

> This is where only a single bit in a bit pair changes at a time > 00 => 01 => 11 => 10