Week 8 Flashcards
max gate delay
add max number of gates needed to reach output
replicate the adder multiple times
ripple carry adder
_____ circuits maintain the current state they are in
sequential
_____ is one of the most basic sequential circuits
latch
latch has an extra input called a _____
enable line
input is frozen when…
enable line is 0
propogation delay:
delay occurs between time input changes & output changes
flip flops:
depend on previous input
depend on current input
cannot be constructed from single gate, but rather pair of latches
changes output every “1” bit // only switches when input “rises”
identity circuit
2 NOT gates, output = 2 T input, where T = 1 gate delay
feedback
joining a circuit back to itself, output is connected to input
S’R’ latch
set or reset logic value of output
Remember (S’R’ table)
S’ = 1, R’ = 1, Q(t) = X, Q(t+1) = Q(t) (No change, quite literally remember the state Q(t) is in)
Set (S’R’ table)
S’ = 0, R’ = 1, Q(t) = X, Q(t+1) = 1 (Start remembering 1)
Reset (S’R’ table)
S’ = 1, R’ = 0, Q(t) = X, Q(t+1) = 0 (Start remembering 0)
(avoid) (S’R’ table)
S’ = 0, R’ = 0, Q(t) = X, Q(t+1) = Q’(t+1) = 1 (bad behavior)