Week 6 Flashcards

1
Q

4 Mneumonics (Instruction Operators)

A

ADD, LOAD, STORE, JUMP

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2
Q

In most assembly languages, the target register goes _____ the source register

A

before

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3
Q

two parts of memory operands:

A

register and a constant (OFFSET)

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4
Q

general process when instruction is executed

A

processor reads the current value from register, adds offset, uses result as memory address

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5
Q

ex: LOAD r1, 20(r3)

A

r1 is what data will be loaded into, add 20 (offset) to r3 to get desired memory address

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6
Q

ex: JUMP 60(r11)

A

add 60 (offset) to r11, treat result as address in instruction memory

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7
Q

_____ contains value that specifies operation

A

opcode field

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8
Q

5 bit opcode implies ___ instructions

A

<=32 (2^5)

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9
Q

a register is a _____ value

A

pointer

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10
Q

offset is a _____ integer

A

2’s complement

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11
Q

3 steps hardware repeats:

A

use instr ptr to fetch instruction, use bits in instr to control hardware that performs operation, move instr ptr to next instr

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12
Q

choice of what statement to execute next

A

control flow

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13
Q

3 control flow paradigms:

A

sequential, skip ahead, step back

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14
Q

instr_bus <- Instr. memory[Current_Instr_Adder]

A

sequential

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15
Q

2 ways actual_next_instruction can be known:

A

statically (ahead of time; at compile time; Ex: Ordinary Statement) or dynamically (only known through executing program; Ex: while loop)

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16
Q

hardware separates fields of instruction such as ___

A

operations, registers, and offset

17
Q

computers have ___ that coordinate data movement

A

controllers

18
Q

1 output for K inputs

A

multiplexer

19
Q

operation fields are passed to the _____

20
Q

fastest to slowest operand types:

A

immediate operands, register operands, main memory

21
Q

CMOS favors ISAs with:

A

fixed-length instructions, simple field structure within representation, small ISA compiler can fully use

22
Q

Add

A

Add the integers in two registers and place the result in a third register

23
Q

Load

A

Load an integer from the data memory into a register

24
Q

Store

A

Store the integer in a register into the data memory

25
Jump
Jump to a new location in the instruction memory
26
Instruction pointer
Consists of a register(set of latches) in the processor that holds the memory address of the next instruction to execute
27
Absolute Branch
Computes a memory address that specifies the location of the next instruction to execute
28
Relative Branch
positive or negative increment for the program counter
29
Current Instruction
Instruction of the current fetch execute cycle
30
Program counter(PC)
Register that contains the pointer to the Current instruction
31
Instruction Decoding
Hardware separates fields of the instruction
32
Locality of Reference
Programs with large numbers of memory operands use them in small batches at a time