Week 6

Question 1

4 Mneumonics (Instruction Operators)

Answer 1

ADD, LOAD, STORE, JUMP

Question 2

In most assembly languages, the target register goes _____ the source register

Answer 2

before

Question 3

two parts of memory operands:

Answer 3

register and a constant (OFFSET)

Question 4

general process when instruction is executed

Answer 4

processor reads the current value from register, adds offset, uses result as memory address

Question 5

ex: LOAD r1, 20(r3)

Answer 5

r1 is what data will be loaded into, add 20 (offset) to r3 to get desired memory address

Question 6

ex: JUMP 60(r11)

Answer 6

add 60 (offset) to r11, treat result as address in instruction memory

Question 7

_____ contains value that specifies operation

Answer 7

opcode field

Question 8

5 bit opcode implies ___ instructions

Answer 8

<=32 (2^5)

Question 9

a register is a _____ value

Answer 9

pointer

Question 10

offset is a _____ integer

Answer 10

2’s complement

Question 11

3 steps hardware repeats:

Answer 11

use instr ptr to fetch instruction, use bits in instr to control hardware that performs operation, move instr ptr to next instr

Question 12

choice of what statement to execute next

Answer 12

control flow

Question 13

3 control flow paradigms:

Answer 13

sequential, skip ahead, step back

Question 14

instr_bus <- Instr. memory[Current_Instr_Adder]

Answer 14

sequential

Question 15

2 ways actual_next_instruction can be known:

Answer 15

statically (ahead of time; at compile time; Ex: Ordinary Statement) or dynamically (only known through executing program; Ex: while loop)

Question 16

hardware separates fields of instruction such as ___

Answer 16

operations, registers, and offset

Question 17

computers have ___ that coordinate data movement

Answer 17

controllers

Question 18

1 output for K inputs

Answer 18

multiplexer

Question 19

operation fields are passed to the _____

Answer 19

ALU

Question 20

fastest to slowest operand types:

Answer 20

immediate operands, register operands, main memory

Question 21

CMOS favors ISAs with:

Answer 21

fixed-length instructions, simple field structure within representation, small ISA compiler can fully use

Question 22

Add

Answer 22

Add the integers in two registers and place the result in a third register

Question 23

Load

Answer 23

Load an integer from the data memory into a register

Question 24

Store

Answer 24

Store the integer in a register into the data memory

Question 25

Jump

Answer 25

Jump to a new location in the instruction memory

Question 26

Instruction pointer

Answer 26

Consists of a register(set of latches) in the processor that holds the memory address of the next instruction to execute

Question 27

Absolute Branch

Answer 27

Computes a memory address that specifies the location of the next instruction to execute

Question 28

Relative Branch

Answer 28

positive or negative increment for the program counter

Question 29

Current Instruction

Answer 29

Instruction of the current fetch execute cycle

Question 30

Program counter(PC)

Answer 30

Register that contains the pointer to the Current instruction

Question 31

Instruction Decoding

Answer 31

Hardware separates fields of the instruction

Question 32

Locality of Reference

Answer 32

Programs with large numbers of memory operands use them in small batches at a time