Memory Types and Properties Flashcards
Register Latency
Lowest
Register Volatile
Yes
Register 2^k capacity
Y
Register Cost/Bit
Highest
Register Density
low
Register location
In Processor
Register Controller complexity
lowest (mux)
SRAM Latency
2nd lowest
SRAM Volatile
Yes
SRAM 2^k capcity
Yes
SRAM Cost / bit
2nd highest
SRAM density
higher (than Register)
SRAM location
On processor chip
SRAM Controller Complexity
low (mux)
DRAM Latency
3rd lowest
DRAM Volatile
Yes
DRAM 2^k Capcity
Yes
DRAM Cost / bit
3rd highest
DRAM density
higher still (than SRAM)
DRAM location
off CPU chip, but close
DRAM Controller complexity
mux + refresher
Flash Latency
very high
Flash Volatile
No
Flash 2^k capcity
Yes
Flash Cost / bit
highest non-volatile
Flash density
higher still (than DRAM)
Flash location
Off CPU chip, but likely close
Flash controller complexity
Complex!!!
Magnetic Disk latency
“glacial” (very very high)
Magnetic Disk volatile
No
Magnetic Disk 2^k capacity
No
Magnetic Disk cost / bit
middle non-volatile
Magnetic Disk density
very high
Magnetic Disk location
“Where’s Waldo??” (Doesn’t matter)
Magnetic Disk controller complexity
complex
Magnetic Tape Latency
“Geographic” (horribly high)
Magnetic Tape volatile
no
Magnetic Tape 2^k capacity
No
Magnetic Tape cost / bit
lowest non-volatile, cheapest overall
Magnetic Tape density
very high
Magnetic Tape location
“Where’s Waldo??” (Doesn’t matter)
Magnetic Tape controller complexity
complex
Order from most important aspect -> least important aspect
Latency,
Volatile,
2^k capacity,
cost / bit,
density,
location,
controller complexity
Speed
Latency
Does it lose data after being turned off?
Volatile
Does it save data after being turned off?
Non-volatile
locations can be accessed by dereferencing a pointer, and less complex controller
2^k capacity
How much money you have to spend
Cost / bit
total capacity for unit device, or capacity per unit area or per volume
Density
Where the memory is
Location
An interface to manage various incompatibilities between the processor and a physical memory device, translates pointers to addressing
Controller