Verilog

Question 1

For a predefined logic gate, what is the order of the ports?

Answer 1

Output
THEN
input

Question 2

How are busses defined?

Answer 2

[MSB:LSB]

Question 3

What is the general format for numbers?

Answer 3

’

Question 4

How is an 8-bit binary number denoted?

Answer 4

8’b<10100001>

Question 5

How is a 6-bit decimal number denoted?

Answer 5

6’d4

Question 6

How is a 4-bit hexadecimal number denoted?

Answer 6

8’hA

Question 7

How should a notted variable/wire be denoted?

Answer 7

variable_n

Question 8

What is hierarchical design?

Answer 8

This is where a device is made up from instantiated devices which in turn are made up of other devices.
This repeates until you get primitives

Question 9

Why use hierarchical design? (5)

Answer 9

> Simplification of design
> Modular
> Easier to read
> Easier to test
> Reusable

Question 10

How can parts of a hierarchical design be reusable?

Answer 10

Local reusability:
> Allows designers to construct solutions for parts/design elements which need to be used multiple times within a singular system
> Shortens design times on similar products
> Allows multiple designers to work on single designs
Commercial reusability:
> Designs can be created, bought and sold as IP

Question 11

How are instantiated designs denoted?

Answer 11

Module_Name part_name (
inputs
outputs
);