Unit 3 Flashcards

1
Q

The vocabulary of commands understood by a given architecture

A

Instruction set

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2
Q

The idea that instructions and data of many types can be stored in memory as numbers and thus be easy to change, leading to the stored-program computer.

A

Stored-program concept

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3
Q

The sum of b and c is placed in a

A

ADD a, b, c

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4
Q

Similarly to the add instruction, blank computes b - c and puts the result in a

A

SUB a, b, c

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5
Q

C, or Java, or Legv8 - requires most lines of source code

A

Legv8

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6
Q

C, or Java, or Legv8 - requires 2nd most lines of source code

A

C

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7
Q

C, or Java, or Legv8 - requires least lines of source code

A

Java

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8
Q

LEGv8 operands how many fast data registers

A

32 registers X0…X30, XZR

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9
Q

LEGv8 operands how many memory doublewords

A

262 memory doublewords Memory[0], Memory [4], …, Memory[4,611,686,018,427,387,904]

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10
Q

assembly language for X1 = X2 + X3

A

ADD X1, X2, X3

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11
Q

assembly language X1 = X2 - X3

A

SUB X1, X2, X3

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12
Q

assembly language X1 = X2 + 20

A

ADDI X1, X2, 20

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13
Q

assembly language X1 = X2 - 20

A

SUBI X1, X2, 20

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14
Q

assembly language X1 = Memory[X2 + 40]

A

LDUR X1, [X2, 40]

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15
Q

assembly language Memory[X2 + 40] = X1

A

STUR X1, [X2, 40]

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16
Q

assembly language X1 = X2 & X3

A

AND X1, X2, X3

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17
Q

assembly language X1 = X2 | X3

A

ORR X1, X2, X3

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18
Q

assembly language X1 = X2 ^ X3

A

EOR X1, X2, X3

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19
Q

assembly language if (X1 == 0) go to PC + 4 + 100

A

CBZ X1, 25

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20
Q

assembly language if (X1 != 0) go to PC + 4 + 100

A

CBNZ X1, 25

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21
Q

assembly language if (condition true) go to PC + 4 + 100

A

B.cond 25

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22
Q

assembly language go to PC + 4 + 10000

A

B 2500

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23
Q

assembly language go to X30

A

BR X30

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24
Q

assembly language X30 = PC + 4; PC + 4 + 10000

A

BL 2500

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25
Q

A natural unit of access in a computer, usually a group of 32 bits.

A

Word

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26
Q

The size of a register in the LEGv8 architecture is blank

A

64 bits

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27
Q

Another natural unit of access in a computer, usually a group of 64 bits; corresponds to the size of a register in the LEGv8 architecture.

A

Doubleword

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28
Q

One major difference between the variables of a programming language and registers is the limited number of registers, typically blank on current computers, like LEGv8

A

32

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29
Q

A very large number of registers may blank the clock cycle time simply because it takes electronic signals longer when they must travel farther.

A

increase

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30
Q

A command that moves data between memory and registers.

A

Data transfer instruction

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31
Q

A value used to delineate the location of a specific data element within a memory array.

A

Address

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32
Q

The data transfer instruction that copies data from memory to a register is traditionally called blank.

A

load

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33
Q

The U in LDUR stands for blank as opposed to scaled immediate, which we explain in COD Section 2.19 (Fallacies and Pitfalls).

A

unscaled immediate

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34
Q

In an LDUR instruction, a blank is the starting address of an array in memory

A

base address

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35
Q

A blank is a register that holds an array’s base address

A

base register

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36
Q

A blank is a constant value added to a base address to locate a particular array element.

A

offset

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37
Q

Since LEGv8 addresses each byte, doubleword addresses are multiples of blank: there are blank bytes in a doubleword.

A

8

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38
Q

The instruction complementary to load is traditionally called blank

A

store

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39
Q

A requirement that data be aligned in memory on natural boundaries.

A

Alignment restriction

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40
Q

The process of putting less frequently used variables (or those needed later) into memory is called blank.

A

spilling registers

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41
Q

Also called binary bit. One of the two numbers in base 2, 0 or 1, that are the components of information.

A

Binary digit

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42
Q

The rightmost bit in an LEGv8 doubleword.

A

Least significant bit

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43
Q

The leftmost bit in an LEGv8 doubleword..

A

Most significant bit

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44
Q

Of a doubleword’s 64 bits, what is the leftmost bit numbered

A

63

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45
Q

What is the largest base ten number representable in 4 bits (assuming the “natural” representation)?

A

15

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46
Q

What is the largest base ten number representable in 8 bits (assuming the “natural” representation)?

A

255

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47
Q

What is the largest base ten number approximately representable by 32 bits (assuming the “natural” representation)?

A

4 billion

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48
Q

How is the largest base ten number representable by 64 bits calculated (assuming the “natural” representation)?

A

2^64 - 1

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49
Q

Hardware can be designed to add, subtract, multiply, and divide these binary bit patterns. If the number that is the proper result of such operations cannot be represented by these rightmost hardware bits, blank is said to have occurred.

A

overflow

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50
Q

A blank is a signed number representation where a single bit is used to represent the sign, and the remaining bits represent the magnitude.

A

sign and magnitude representation

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51
Q

A signed number representation where a leading 0 indicates a positive number and a leading 1 indicates a negative number. The complement of a value is obtained by complementing each bit (0 → 1 or 1 → 0), and then adding one to the result (explained further below).

A

Two’s complement

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52
Q

Signed versus unsigned applies to loads as well as to arithmetic. The function of a signed load is to copy the sign repeatedly to fill the rest of the register, known as a blank.

A

sign extension

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53
Q

A notation that represents the most negative value by 10 … 000two and the most positive value by 01 … 11two, leaving an equal number of negatives and positives but ending up with two zeros, one positive (00 … 00two) and one negative (11 … 11two). The term is also used to mean the inversion of every bit in a pattern: 0 to 1 and 1 to 0.

A

One’s complement

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54
Q

A notation that represents the most negative value by 00 … 000two and the most positive value by 11 … 11two, with 0 typically having the value 10 … 00two, thereby biasing the number such that the number plus the bias has a non-negative representation.

A

Biased notation

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55
Q

How is 0 represented in two’s complement?

A

All 0’s

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56
Q

A machine instruction is composed of blank, each field having several bits and representing some part of the instruction.

A

fields

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57
Q

A form of representation of an instruction composed of fields of binary numbers.

A

Instruction format

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58
Q

Binary representation used for communication within a computer system.

A

Machine language

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59
Q

How many total bits is a machine instruction?

A

32

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60
Q

Numbers in base 16.

A

Hexadecimal

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61
Q

The field that denotes the operation and format of an instruction.

A

Opcode

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62
Q

A blank is a register that receives the result of an operation.

A

destination register

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63
Q

ADD is an blank instruction with 5 fields: opcode, Rm, shamt, Rn and Rd.

A

“R-type”

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64
Q

ADDI and SUBI is an blank rather than “R-type” instruction.

A

“I-type” (I for immediate)

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65
Q

DUR and STUR are blank with op2 as an extension of the opcode field.

A

“D-type” formats

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66
Q

Today’s computers are built on what two key principles:

A

Instructions are represented as numbers.
Programs are stored in memory to be read or written, just like data.

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67
Q

Instructions are represented as numbers.

Programs are stored in memory to be read or written, just like data.

These principles lead to the blank

A

stored-program concept

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68
Q

blank can contain the source code for an editor program, the corresponding compiled machine code, the text that the compiled program is using, and even the compiler that generated the machine code.

A

memory

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69
Q

One consequence of instructions as numbers is that programs are often shipped as files of binary numbers. The commercial implication is that computers can inherit ready-made software provided they are compatible with an existing instruction set. Such blank often leads industry to align around a small number of instruction set architectures.

A

“binary compatibility”

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70
Q

LSL

A

shift left

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71
Q

«

A

LSL

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72
Q

LSR

A

shift right

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73
Q

> >

A

LSR

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74
Q

&

A

AND, ANDI

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75
Q

|

A

ORR, ORRI

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76
Q

~

A

NOT, EOR, EORI

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77
Q

A blank moves all the bits in a doubleword to the left or right, filling the emptied bits with 0s.

A

shift

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78
Q

Shifting left by i bits gives the same result as blank by 2^i

A

multiplying

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79
Q

A logical bit- by-bit operation with two operands that calculates a 1 only if there is a 1 in both operands.

A

AND

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80
Q

As you can see, AND can apply a bit pattern to a set of bits to force 0s where there is a 0 in the bit pattern. Such a bit pattern in conjunction with AND is traditionally called a blank, since the mask “conceals” some bits.

A

mask

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81
Q

A logical bit-by-bit operation with two operands that calculates a 1 if there is a 1 in either operand.

A

OR

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82
Q

A logical bit-by-bit operation with one operand that inverts the bits; that is, it replaces every 1 with a 0, and every 0 with a 1.

A

NOT

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83
Q

A logical bit-by-bit operation with two operands that calculates the exclusive OR of the two operands. That is, it calculates a 1 only if the values are different in the two operands.

A

EOR

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84
Q

This instruction means go to the statement labeled L1 if the value in register equals zero. The mnemonic CBZ stands for compare and branch if zero.

A

CBZ register, L1

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85
Q

It means go to the statement labeled L1 if the value in register does not equal zero. The mnemonic CBNZ stands for compare and branch if not zero. These two instructions are traditionally called conditional branches.

A

CBNZ register, L1

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86
Q

An instruction that tests a value and that allows for a subsequent transfer of control to a new address in the program based on the outcome of the test.

A

Conditional branch

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87
Q

A sequence of instructions without branches (except possibly at the end) and without branch targets or branch labels (except possibly at the beginning).

A

Basic block

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88
Q

the result that set the condition code had a 1 in the most significant bit;

A

negative (N)

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89
Q

the result that set the condition code was 0;

A

zero (Z)

90
Q

the result that set the condition code overflowed

A

overflow (V)

91
Q

the result that set the condition code had a carry out of the most significant bit or a borrow into the most significant bit.

A

carry (C)

92
Q

EQ

A

(= or Equal)

93
Q

HS

A

(≥ or Higher or Same).

94
Q

HI

A

(> or Higher

95
Q

LS

A

(≤ or Lower or Same)

96
Q

LO

A

(< or Lower),

97
Q

GE

A

(≥ or Greater than or Equal).

98
Q

GT

A

(> or Greater Than)

99
Q

LE

A

(≤ or Less than or Equal)

100
Q

LT

A

(< or Less Than)

101
Q

NE

A

(≠ or Not Equal)

102
Q

Branch on minus

A

(B.MI): N=1;

103
Q

Branch on plus

A

(B.PL): N=0;

104
Q

Branch on overflow set

A

(B.VS): V=1;

105
Q

Branch on overflow clear .

A

(B.VC): V=0

106
Q

In LEGv8 assembly language, you simply append an blank to the end of one of these instructions if you want to set condition codes: ADDS, ADDIS, ANDS, ANDIS, SUBS, and SUBIS. The instruction name actually uses the term flag, so the proper name of ADDS is “add and set flags.

A

S

107
Q

=

A

B.EQ

108
Q

not equal

A

B.NE

109
Q

<

A

B.LT or B.LO

110
Q

<=

A

B.LE or B.LS

111
Q

>

A

B.GT or B.HI

112
Q

> =

A

B.GE or B.HS

113
Q

How many bits are used to hold a condition code?

A

4

114
Q

How is conditional branching performed in MIPS?

A

In MIPS, two registers are compared and the result of the comparison is stored in a third register.

115
Q

Most programming languages have a blank statement that allows the programmer to select one of many alternatives depending on a single value.

A

case or switch

116
Q

The simplest way to implement switch is via a sequence of conditional tests, turning the switch statement into a chain of blank

A

if-then-else statements.

117
Q

Also called branch table. A table of addresses of alternative instruction sequences.

A

Branch address table

118
Q

A stored subroutine that performs a specific task based on the parameters with which it is provided.

A

Procedure

119
Q

eight parameter registers in which to pass parameters or return values.

A

X0-X7

120
Q

one return address register to return to the point of origin.

A

LR (X30)

121
Q

An instruction that branches to an address and simultaneously saves the address of the following instruction in a register (LR or X30 in LEGv8).

A

Branch-and-link instruction

122
Q

The blank is needed because the same procedure could be called from several parts of the program.

A

return address

123
Q

A link to the calling site that allows a procedure to return to the proper address; in LEGv8 it is stored in register LR (X30).

A

Return address

124
Q

The program that instigates a procedure and provides the necessary parameter values.

A

Caller

125
Q

A procedure that executes a series of stored instructions based on parameters provided by the caller and then returns control to the caller.

A

Callee

126
Q

The register containing the address of the instruction in the program being executed.

A

Program counter (PC)

127
Q

A data structure for spilling registers organized as a last-in- first-out queue.

A

Stack

128
Q

A value denoting the most recently allocated address in a stack that shows where registers should be spilled or where old register values can be found. In LEGv8, it is register SP.

A

Stack pointer

129
Q

Add element to stack.

A

Push

130
Q

Remove element from stack.

A

Pop

131
Q

temporary registers that are not preserved by the callee (called procedure) on a procedure call

A

X9 - X17

132
Q

saved registers that must be preserved on a procedure call (if used, the callee saves and restores them)

A

X19 - X28

133
Q

Procedures that do not call others are called blank.

A

leaf procedures

134
Q

The register that is reserved to point to the static area.

A

Global pointer

135
Q

Also called activation record. The segment of the stack containing a procedure’s saved registers and local variables.

A

Procedure frame

136
Q

A value denoting the location of the saved registers and local variables for a given procedure.

A

Frame pointer

137
Q

The segment of a UNIX object file that contains the machine language code for routines in the source file.

A

Text segment

138
Q

Most computers today offer 8-bit bytes to represent characters, with the blank being the representation that nearly everyone follows.

A

American Standard Code for Information Interchange (ASCII)

139
Q

blank loads a byte from memory, placing it in the rightmost 8 bits of a register.

A

Load byte (LDURB)

140
Q

blank takes a byte from the rightmost 8 bits of a register and writes it to memory.

A

Store byte (STURB)

141
Q

blank is a universal encoding of the alphabets of most human languages.

A

Unicode

142
Q

The LEGv8 instruction set has explicit instructions to load and store such 16- bit quantities, called blank.

A

halfwords

143
Q

blank loads a halfword from memory, placing it in the rightmost 16 bits of a register.

A

Load half (LDURH)

144
Q

blank takes a halfword from the rightmost 16 bits of a register and writes it to memory.

A

Store half (STURH)

145
Q

The LEGv8 instruction set includes the instruction blank and blank specifically to set any 16 bits of a constant in a register.

A

move wide with zeros (MOVZ)
move wide with keep (MOVK)

146
Q

blank = Register + Branch offset

A

Program counter

147
Q

An addressing regime in which the address is the sum of the program counter (PC) and a constant in the instruction.

A

PC-relative addressing

148
Q

The operand is a constant within the instruction itself

A

Immediate addressing

149
Q

The operand is a register

A

Register addressing

150
Q

The operand is at the memory location whose address is the sum of a register and a constant in the instruction

A

Base addressing / displacement addressing

151
Q

The branch address is the sum of the PC and a constant in the instruction

A

PC-relative addressing

152
Q

One of several addressing regimes delimited by their varied use of operands and/or addresses.

A

Addressing mode

153
Q

Two memory accesses form a blank if they are from different threads to same location, at least one is a write, and they occur one after another.

A

Data race

154
Q

A symbolic language that can be translated into binary machine language

A

Assembly language

155
Q

A common variation of assembly language instructions often treated as if it were an instruction in its own right.

A

Pseudoinstruction

156
Q

A table that matches names of labels to the addresses of the memory words that instructions occupy.

A

Symbol table

157
Q

A blank converts a high-level program, such as a C program, into an assembly language program.

A

compiler

158
Q

An blank is used to convert an assembly language program to a machine language program.

A

assembler

159
Q

Also called link editor. A systems program that combines independently assembled machine language programs and resolves all undefined labels into an executable file

A

Linker:

160
Q

There are three steps for the linker:

A

Place code and data modules symbolically in memory.
Determine the addresses of data and instruction labels.
Patch both the internal and external references.

161
Q

A functional program in the format of an object file that contains no unresolved references. It can contain symbol tables and debugging information. A “stripped executable” does not contain that information. Relocation information may be included for the loader.

A

Executable file:

162
Q

A systems program that places an object program in main memory so that it is ready to execute.

A

Loader

163
Q

Library routines that are linked to a program during execution.

A

Dynamically linked libraries (DLLs):

164
Q

An executable file is executed after a blank places the file into main memory.

A

loader

165
Q

Instruction from an instruction set designed to interpret Java programs.

A

Java bytecode

166
Q

The program that interprets Java bytecodes.

A

Java Virtual Machine (JVM)

167
Q
A
168
Q

The name commonly given to a compiler that operates at runtime, translating the interpreted code segments into the native code of the computer.

A

Just In Time compiler (JIT)

169
Q

When translating from C to assembly language by hand, we follow these general steps:

A

Allocate registers to program variables.
Produce code for the body of the procedure.
Preserve registers across the procedure invocation.

170
Q

By convention, LEGv8 uses blank registers for parameter passing allocation.

A

8

171
Q

Sequential doubleword addresses are blank apart, therefore a variable index needs to be multiplied by 8 before adding the variable index to the address.

A

8 bytes

172
Q

Reads in a source program and translates the program to an intermediate representation.

A

front end

173
Q

The blank checks the syntax and semantics, reporting detected errors. Via different blanks, a program may even have parts written in different languages, each read into the intermediate representation and then processed by subsequent phases.

A

front end

174
Q

Relatively-big changes to a program that yield the same function, but may optimize a program’s performance or other metric.

A

high-level optimization

175
Q

An example of a high-level optimization is blank, which replaces a procedure call (which can be slow) with the procedure’s actual instructions (which may yield more instructions overall, but faster performance). Another example is loop-unrolling, which replaces a loop with groups of statements, each group corresponding to a particular loop iteration.

A

procedure inlining

176
Q

Global and local optimizations.

A

Global optimizer

177
Q

Makes changes to instructions that may yield less code or better performance, such as not computing an expression like (9/5)C + 32 twice, but instead reusing the result.

A

Global optimizer

178
Q

Converts the optimized intermediate representation into a processor’s machine instructions.

A

code generator

179
Q

The last compiler phase outputs the actual processor-specific program. Much of the compiler’s optimizations are independent of any particular processor, meaning most of the sophisticated software of a compiler can be used for any processor.

A

code generator

180
Q

A technique to get more performance from loops that access arrays, in which multiple copies of the loop body are made and instructions from different iterations are scheduled together.

A

Loop-unrolling

181
Q

A Java keyword that allows a method to be invoked by any other method.

A

Public

182
Q

A Java keyword that restricts invocation of a method to other methods in that package.

A

Protected

183
Q

Basically a directory that contains a group of related classes.

A

Package

184
Q

A method that applies to the whole class rather to an individual object. It is unrelated to static in C.

A

Static method

185
Q

In contrast to C, Java explicitly stores an extra item in every array indicating the array’s blank

A

upper bound

186
Q

In contrast to C, Java calls the appropriate method (procedure) based on the ____ of the calling object.

A

type

187
Q

A register that can be used for addresses or for data with virtually any instruction.

A

General-purpose register (GPR)

188
Q

Unconditional jump

A

jmp

189
Q

Load ES register and a GPR from memory

A

les

190
Q

Copy string from source to destination

A

movs

191
Q

Jump if not zero

A

jnz

192
Q

Move data between two registers

A

move

193
Q

Load a byte, word, or doubleword of a string into the EAX register

A

lods

194
Q

Total number of ARMv8 integer machine language instructions

A

250

195
Q

Total number of ARMv8 SIMD/Vector assembly language instructions.

A

245

196
Q

ARMv8 assembly language registers used for 32-bit operations.

A

W0, W1…

197
Q

Number of branch instructions in LEGv8

A

6

198
Q

Return from subroutine instruction

A

RET

199
Q

Number of branch instructions in ARMv8

A

23

200
Q

Branch register instruction

A

BR

201
Q

T/F Using standard instructions can result in higher performance than using powerful instructions crafted specifically for an architecture.

A

True

202
Q

T/F Assembly language programs are not easily portable because of the many different architectures of current and future computers.

A

True

203
Q

Archaic term for register. On-line use of it as a synonym for “register” is a fairly reliable indication that the user has been around quite a while

A

Accumulator

204
Q

Also called register-register architecture. An instruction set architecture in which all operations are between registers and data memory may only be accessed via loads or stores.

A

Load-store architecture

205
Q

No registers architecture

A

stack architecture

206
Q

register-register architecture

A

load-store architecture

207
Q

Single register architecture

A

Accumulator architecture

208
Q

Programming language-based architecture

A

High-level-language-based architecture

209
Q

Reduced instruction set computer architecture

A

RISC architecture

210
Q

An _________ processor powered the Apple Newton personal digital assistant.

A

ARM

211
Q

The first microprocessors were precursors to the _________ architecture.

A

X86

212
Q

The 8088 processors were used to power _________ computers in the 1980s.

A

IBM PC

213
Q

_________, developed for use in business settings, employs English vocabulary and punctuation.

A

COBOL

214
Q

_________, developed for IBM’s 704 computer in 1954, was one the first widely used programming languages.

A

FORTRAN

215
Q

In the 1970s, Bell Labs built the UNIX operating system using the _________ language.

A

C

216
Q

_________ was invented as a way to express algorithms more naturally than its predecessors, with less focus on coding.

A

Algol

217
Q

Dynamic data structures and pointers were major contributions of _________.

A

LISP

218
Q

_________ is currently the most popular language to teach in schools and is the standard language for business data processing applications.

A

Java

219
Q

ex and yacc were developed as a part of the blank operating system,

A

UNIX

220
Q

In early compilers, processes such as parsing and scanning consisted of ad hoc approaches. These processes were replaced by tools derived from blank

A

automata theory

221
Q

Blank, unlike RISC architectures, do not use registers and therefore remove the need for register allocation.

A

Stack architectures