Study Guide #4 Flashcards

1
Q

What are the three types of instructions in our theoretical computer?

A

Memory reference, register reference, and I/O

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2
Q

opcode 000-110

A

memory reference

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3
Q

opcode 111, I = 0

A

register reference

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4
Q

opcode 111, I = 1

A

I/O

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5
Q

PC

A

program counter

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6
Q

AR

A

address register

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7
Q

IR

A

instruction register

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8
Q

TR

A

temporary register

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9
Q

OUTR

A

output register

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10
Q

INPR

A

input register

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11
Q

DR

A

data register

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12
Q

AC

A

accumulator

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13
Q

Direct addressing

A

I = 0; address field contains effective address (1 memory read)

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14
Q

Indirect addressing

A

I = 1; address field contains address of effective address (2 memory reads)

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15
Q

Instructions for branching to a subroutine

A

BSA: Branch and save return address

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16
Q

Three machine instructions that are used for program control

A

BSA, BUN, ISZ

17
Q

Are recursive subroutines supported on our theoretical computer?

A

No because the return address would be overwritten every time

18
Q

What happens when an interrupt cycle occurs

A

PC set to 0
return address is stored in memory address zero
BUN goes to I/O that handles interrupt
* can occur at any instruction

19
Q

How does the computer return from the interrupt routine?

A

BUN (branch unconditional) to blank word before subroutine
ION: turns interrupt flag back on

20
Q

Can a second interrupt occur during the interrupt routine?

A

No the first one has to finish

21
Q

Can a subroutine be interrupted?

A

Yes as long as you are not in the I/O program

22
Q

What is the purpose of the timing signals and how are they generated?

A

Allow sequencing of events
generated by the control unit (4-bit counter into decoder)

23
Q

Describe all flags associated with the I/O process

A

Registers: OUTR and INPR
Flags: FGI and FGO

24
Q

What two flags are associated with I/O and explain what they control

A

FGI and FGO control input and output

25
Q

Program-controlled I/O

A

loops continuously until FGI or FGO = 1
LESS EFFICIENT

26
Q

Interrupt-driven I/O

A

allows CPU to do other things, then interrupts it when FGI or FGO = 1

27
Q

How do we create a loop in the machine language in the theoretical computer?

A

ISZ (increment and skip if zero)

28
Q

Describe the two decoders in the theoretical computer

A

Both in control unit
4x16: timing pulses
3x8: chooses opcode

29
Q

Name and describe two ways that the control signals can be generated in a computer. Which one does our theoretical computer use?

A

Hardware: actually build the circuit (theoretical computer)
microprogram control: store 0s and 1s for control signals in memory (modern computers)

30
Q

What takes place during timing pulse T3 on our theoretical computer?

A

Indirect addressing: indirect cycle
otherwise skip

31
Q

T/F: execution always begins at timing pulse T4

A

True

32
Q

Give similarities and differences between a subroutine call and the interrupt cycle

A
  • Subroutine called through BSA and is done as an instruction in the program
  • Interrupts can occur anywhere since its hardware driven
33
Q

What two instructions are required at the end of an interrupt routine and explain

A

ION: turn interrupt flag back on to allows interrupts again
BUN: go back to the saves return address at address 0

34
Q

What are the inputs to the control unit of our basic computer?

A

Increment, Clear, Clock

35
Q

What are the two flags that are associated with the interrupt cycle? what is the purpose of each

A

FGI: input flag (1: keyboard -> INPR, 0: INPR -> AC)
FGO: output flag (1: AC -> OUTR, 0: OUTR -> screen/printer)

36
Q

What was the purpose of Lab 8

A

to make a circuit that connect to all 8 LEDs and turns one on at a time from left to right

37
Q

What chips were used in Lab 8

A

Personally: AND, JK Flip-flips, Decoder, Inverters