Study Guide #2 Flashcards

1
Q

What is a combinational circuit?

A

circuit with more than one output

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2
Q

MUX operations

A

select lines determine which input goes to output. Select lines represent binary form of output #.

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3
Q

DEMUX operations

A

select lines determine which output the input goes to. Select lines represent binary form of output #.

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4
Q

MUX uses

A
  • implement boolean functions
  • implement truth table
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5
Q

Encoder operations

A

receives one high input and outputs the binary form through the access lines.

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6
Q

Decoder operations

A

receives binary input of number through access lines and outputs to corresponding output line.

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7
Q

Which Encoder/Decoder has an enable line?

A

Decoder

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8
Q

Which of the four chips (MUX, DEMUX, Encoder, and Decoder) are the same just a different view?

A

DEMUX and Decoder

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9
Q

How to implement boolean function using MUX

A

Draw MUX according to number of variables (ex. A,B,C = 3 seclect lines), then tie each input line from function to power and ground

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10
Q

How is a decoder used to implement a boolean function?

A

same way as MUX

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11
Q

Explain the SR latch

A

sets and resets circuit

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12
Q

What is the problem with the SR latch?

A

invalid when both inputs are high

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13
Q

Explain the clocked SR latch

A

timed set and reset

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14
Q

What is the problem with the clocked SR latch?

A

When clock is high, it can change status multiple times

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15
Q

JK flip-flip operation

A

set and reset with added protection

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16
Q

SR flip-flop operation

A

set and reset

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17
Q

D flip-flip operation

A

hold data

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18
Q

T fliop-flop operation

A

stay same or inverse

19
Q

SR flip-flip characteristic table

A

0 0 Q(T)
0 1 0
1 0 1
1 1 NOT ALLOWED

20
Q

JK flip-flop characteristic table

A

0 0 Q(T)
0 1 0
1 0 1
1 1 Q’(T)

21
Q

D flip-flip characterictic table

22
Q

T flip-flop characteristic table

A

0 Q(T)
1 Q’(T)

23
Q

JK flip-flop excitation table

A

J K Q(T) Q(T+1)
0 0 0 X
0 1 1 X
1 0 X 1
1 1 X 0

24
Q

How to convert JK flip-flop into D flip-flop

A

Pass D into J, then use inverter to pass D’ into K

25
What is a sequential circuit?
Digital circuit that contains atleast one flip-flop
26
Register definition
consists of n flip-flips together with combinational control circuit capable of storing n bits
27
Problem with traditional register
always loading
28
Normal registers contain
clock, inputs, D flip-flops, outputs
29
Parallel registers contain
clock, inputs, load, AND gates, OR gates, D flip-flop, outputs
30
shift register
goes right to left or left to right depending on right or left shift.
31
registers use which flip-flops
D flip-flops
32
Sequential circuits use which flip-flops
JK flip-flops
33
figure 2.9 represents
bidirectional shift register with parallel load
34
RAM characteristics
Volatile - all memory is lost when power is lost stores words (power of 2) - all words have same size (multiple of 8) Internal structure is specified by # of words and word size - each word has an address
35
ROM characteristics
non-volatile - keeps data after power loss performs only READ contents of ROM is loaded during manufacturing
36
what size is 2716 EPROM
2k x 8
37
How many address lines and data lines does the Z80 CPU chip have
8 data lines, 16 address lines
38
Which RAM/ROM had read/write control line?
RAM
39
Lab 4: which sequential circuit did you have to build?
when Y is 1, the circuit counts from 0 - 3 then repeats, when Y is 0, circuit stays in current state
40
Lab 4: what was the purpose of the input line?
control if circuit counts or stays at current state
41
Lab 4: what was the extra credit?
Implement the BCD encoder to show the binary number on the 7 segment LED display
42
Lab 5: What type of flip-flip circuit did we build?
SR latch
43
Lab 5: did it change on rising edge or falling edge of clock?
rising edge (from 0 - 1) not falling edge (1 - 0)
44
Lab 5: What was the extra credit?
build SR master-slave flip-flop