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Computer Science: Frankie > SLR1 > Flashcards

SLR1 Flashcards

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1
Q

What is distributed computing

A

Having multiple computers work on the same network

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2
Q

What are the benefits of distributed computing

A

Gives more processing power to the computer

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3
Q

What does contemporary architecture mean

A

More modern

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4
Q

There are 2 types of temporary architecture. What are they called?

A

SIMD & MIMD

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5
Q

What are the characteristics of SIMD

A
  • Single Instruction Multiple Data
  • Can carry out a single instruction across multiple data types
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6
Q

What are the characteristics of MIMD

A
  • Multiple Instruction Multiple Data
  • Can carry out multiple instructions across multiple data types
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7
Q

What are the 4 traits of Harvard architecture

A
  • Instructions and data are stored in separate memory units
  • Each memory unit has its own bus
  • Reading and writing data can be done at the same time
  • Used in RISC processors
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8
Q

What are the 5 traits of Von-Neumann architecture

A
  • Shared Memory Space for instructions and data
  • Instructions and data are stored in the same format
  • One instruction at a time
  • Travels along the system bus
  • Registers are used as fast access to instructions and data
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9
Q

How does arithmetic pipelining work

A

Breaking down and overlapping parts of an operation to be carried out

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10
Q

What is flushing the pipe

A

Lines of code pulled into this cycle may not be needed meaning these lines of code must be removed from the CPU. E.g. IF statements

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11
Q

How does pipelining work

A

A processor must fetch, decode, and execute every single instruction. The process of pipelining is to have 3 instructions in the pipe one being fetched another being decoded and another being executed.

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12
Q

What are the 2 parts of pipelining called

A
  • Instruction pipelining
  • Arithmetic pipelining
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13
Q

How does instruction pipelining work

A

The process of the different stages the instruction must move through a processor

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14
Q

What is in each core

A

A complete copy of the CPU

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15
Q

How does the number of cores affect the power of the CPU

A

The more cores the more power but it’s a cumulative growth meaning that doubling the number of cores will not double to power of the CPU

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16
Q

What is clock speed measured in

A

Hz (Hertz)

17
Q

What does Hertz stand for

A

The number of cycles per second

18
Q

Modern processors operate at billions of cycles per second. What is this called?

A

GHz (GigaHertz)

19
Q

Where is the cache located

A

Near to or on the CPU

20
Q

What are the positives of the cache

A

Faster than RAM

21
Q

What are the negatives of cache

A

Smaller than RAM

22
Q

In the fetch, decode, execute cycle. What are the 5 steps of the execute stage?

A
  1. Send the address to the MAR
  2. Send the address down the address bus to main memory
  3. The control unit now sends a read signal along the control bus to main memory
  4. The contents stored in the memory address is now sent along the data bus to the MDR
  5. The contents of the MDR is copied into the accumulator.
    The instruction is now complete
23
Q

An instruction is made up of two parts what are they called

A

Opcode and operand

24
Q

What is the purpose of the opcode

A

Tells the computer what to do

25
Q

What is the purpose of the operand

A

Tells the computer what to do the opcode to (could contain the data or where to find it)

26
Q

What does the operand and opcode make up

A

An 8-bit code

27
Q

Once we have decoded the 8-bit instruction we need to carry out its instruction which could be one of 11 mnemonics. What are they?

A
  1. ADD
  2. SUB
  3. STA
  4. LDA
  5. BRA
  6. BRZ
  7. BRP
  8. INP
  9. OUT
  10. HLT
  11. DAT
28
Q

In the fetch, decode, execute cycle. What are the 7 steps of the fetch stage?

A
  1. The program counter is checked as it holds the address of the next instruction
  2. The addresses store is then copied into the MAR
  3. The address is then sent along the address bus to the main memory, where it waits for a signal from the control bus
  4. The control unit sends a read signal along the control bus to main memory
  5. The contents of the address can be sent along the data bus to the MDR
  6. The data received by the MDR is now copied into the CIR
  7. The contents of the program is incremented by 1
    The fetch stage is now complete
29
Q

What does the address bus do

A

Carries the memory addresses that identify where data is being read from or written to

30
Q

What does the data bus do

A

Carries the ones and zeros that make the information being transmitted around the CPU

31
Q

What does the control bus do

A

Carries the command and control signals to and from every component in the CPU

32
Q

What is the structure and / or function of the ALU

A
  1. Performs arithmetic and logical operations on data
  2. Arithmetic operations on fixed and floating point numbers
  3. ALU = Arithmetic Logic Unit
33
Q

What is the structure and / or function of the accumulator

A
  1. Data or control information is often stored here
  2. The more general purpose registers the faster the CPU
34
Q

What is the structure and / or function of the MDR

A
  1. Temporarily stores data
  2. All data traveling to or from memory must travel down the address bus
  3. MDR = Memory Data Register
35
Q

What is the structure and / or function of the CIR

A
  1. Holds the current instruction
  2. Holds the opcode and operand of the current instruction
  3. CIR = Current Instruction Register
36
Q

What is the structure and / or function of the program counter

A
  1. Holds the address of the next instruction
  2. Works with the MAR
37
Q

What is the structure and / or function of the MAR

A
  1. Holds the memory location from which data or an instruction can be fetched from
  2. Sends these to the address bus
  3. MAR = Memory Address Register
38
Q

What is the structure and / or function of the control unit

A
  1. Coordinates the CPU, controls the flow of data between the CPU and other devices
  2. Accepts the next instruction and carries it out
  3. Makes extensive use of the status registers and clock, communicates with all parts of the CPU

Computer Science: Frankie (25 decks)

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