SLR1 Flashcards
What is distributed computing
Having multiple computers work on the same network
What are the benefits of distributed computing
Gives more processing power to the computer
What does contemporary architecture mean
More modern
There are 2 types of temporary architecture. What are they called?
SIMD & MIMD
What are the characteristics of SIMD
- Single Instruction Multiple Data
- Can carry out a single instruction across multiple data types
What are the characteristics of MIMD
- Multiple Instruction Multiple Data
- Can carry out multiple instructions across multiple data types
What are the 4 traits of Harvard architecture
- Instructions and data are stored in separate memory units
- Each memory unit has its own bus
- Reading and writing data can be done at the same time
- Used in RISC processors
What are the 5 traits of Von-Neumann architecture
- Shared Memory Space for instructions and data
- Instructions and data are stored in the same format
- One instruction at a time
- Travels along the system bus
- Registers are used as fast access to instructions and data
How does arithmetic pipelining work
Breaking down and overlapping parts of an operation to be carried out
What is flushing the pipe
Lines of code pulled into this cycle may not be needed meaning these lines of code must be removed from the CPU. E.g. IF statements
How does pipelining work
A processor must fetch, decode, and execute every single instruction. The process of pipelining is to have 3 instructions in the pipe one being fetched another being decoded and another being executed.
What are the 2 parts of pipelining called
- Instruction pipelining
- Arithmetic pipelining
How does instruction pipelining work
The process of the different stages the instruction must move through a processor
What is in each core
A complete copy of the CPU
How does the number of cores affect the power of the CPU
The more cores the more power but it’s a cumulative growth meaning that doubling the number of cores will not double to power of the CPU
What is clock speed measured in
Hz (Hertz)
What does Hertz stand for
The number of cycles per second
Modern processors operate at billions of cycles per second. What is this called?
GHz (GigaHertz)
Where is the cache located
Near to or on the CPU
What are the positives of the cache
Faster than RAM
What are the negatives of cache
Smaller than RAM
In the fetch, decode, execute cycle. What are the 5 steps of the execute stage?
- Send the address to the MAR
- Send the address down the address bus to main memory
- The control unit now sends a read signal along the control bus to main memory
- The contents stored in the memory address is now sent along the data bus to the MDR
- The contents of the MDR is copied into the accumulator.
The instruction is now complete
An instruction is made up of two parts what are they called
Opcode and operand
What is the purpose of the opcode
Tells the computer what to do
What is the purpose of the operand
Tells the computer what to do the opcode to (could contain the data or where to find it)
What does the operand and opcode make up
An 8-bit code
Once we have decoded the 8-bit instruction we need to carry out its instruction which could be one of 11 mnemonics. What are they?
- ADD
- SUB
- STA
- LDA
- BRA
- BRZ
- BRP
- INP
- OUT
- HLT
- DAT
What does the address bus do
Carries the memory addresses that identify where data is being read from or written to
What does the data bus do
Carries the ones and zeros that make the information being transmitted around the CPU
What does the control bus do
Carries the command and control signals to and from every component in the CPU
What is the structure and / or function of the ALU
- Performs arithmetic and logical operations on data
- Arithmetic operations on fixed and floating point numbers
- ALU = Arithmetic Logic Unit
What is the structure and / or function of the accumulator
- Data or control information is often stored here
- The more general purpose registers the faster the CPU
What is the structure and / or function of the MDR
- Temporarily stores data
- All data traveling to or from memory must travel down the address bus
- MDR = Memory Data Register
What is the structure and / or function of the CIR
- Holds the current instruction
- Holds the opcode and operand of the current instruction
- CIR = Current Instruction Register
What is the structure and / or function of the program counter
- Holds the address of the next instruction
- Works with the MAR
What is the structure and / or function of the MAR
- Holds the memory location from which data or an instruction can be fetched from
- Sends these to the address bus
- MAR = Memory Address Register
What is the structure and / or function of the control unit
- Coordinates the CPU, controls the flow of data between the CPU and other devices
- Accepts the next instruction and carries it out
- Makes extensive use of the status registers and clock, communicates with all parts of the CPU
