Section 5 Computer Orginisation and Architecture

Question 1

what is the fde cycle

Answer 1

fetch decode execute cycle

Question 2

what happens in the fetch part of frhe cycle ?

Answer 2

causes the next instruction to be fetched from main memory

Question 3

what happens during the decode part of the cycle

Answer 3

the instruction is decoded

Question 4

what is the alu

Answer 4

arithmetic logic unit

performs different sorts of operations on data such as addition subtraction multipilication and division.

Question 5

what is the cu?

Answer 5

control unit , regulates and intergrates the operations of the computer/ controls and coordinates the activities of the cpu

Question 6

what is a bus ?

Answer 6

a set of parallel wires connecting two or more compoments of a computer

Question 7

what are the three busses ?

Answer 7

control bus
data bus
address bus

Question 8

what is the control bus ?

Answer 8

a bi diectional bus that transmits commands , timings and specific status information between system compoments

Question 9

what is the data bus ?

Answer 9

a bus that provides a bi directional path for moving data and instructions between system compoments

Question 10

what is the address bus ?

Answer 10

a bus that identifies the location in cache or main memory that is to be read or written to

Question 11

the width of what bus determines overall system performance ?

Answer 11

data bus

Question 12

the width of what bus determines the maximum possible memory capacity of the system ?

Answer 12

address bus

Question 13

what are I/O controllers?

Answer 13

a device which interfaces between an input or output device and the processor

Question 14

what is an interface ?

Answer 14

a standardised form of connecting defining things as signals , number of connecting pins and voltage levels

Question 15

explain the von neumann architecture ?

Answer 15

the basic compoments of the computer and processor in which a shared memory and bus is used for both data and instructions

Question 16

what is the stored program concept

Answer 16

machine code instructions are fetched and executed serially by a processor that performs arithmetic and logical operations

Question 17

explain the harvard architecture

Answer 17

a computer atchotecture with phycially seperate memories for instructions and data

Question 18

what is the system clock ?

Answer 18

generates a series of signals , switching between 1 and 0 billions of times per second and synchronising cpu operations

Question 19

what is the accumilator ?

Question 20

what is a PC ?

Answer 20

program counter , holds the address of the next instruction to be executed

Question 21

what is fhe CIR ?

Answer 21

current instruction register , holds current instruction being executed

Question 22

what is the mar?

Answer 22

memory address register , holds address of the memory location from which data is to be fetched

Question 23

what is the mbr ?

Answer 23

memory buffer register , temporarily stores data read from or written to memory

Question 24

what is the status register?

Answer 24

contains bits that are set or cleared depending on the result of an instruction

Question 25

factors affecting processor performance

Answer 25

• number of cores
• the amount and type of cache memory
• clock speed
• word legnth
• adsress bus width
• data bus width

Question 26

explain the fetch phase of the fde cycle

Answer 26

address of next instruction copied from PC to MAR , sent via address bus to main memory
instruction held at address is returned along the data bus to MBR
the content of the MBR is copied to CIR

Question 27

explain the decode phase of the cycle

Answer 27

intruction held at CIR is decoded

instruction split into opcode and opcode is used to deterine the type of instruction

Question 28

explain the execute phase of the cycle

Answer 28

instruction is executed

Question 29

what is level 1 cache

Answer 29

extremely small but fast memory

between 2 - 64 kb

Question 30

what is level 2 cache

Answer 30

failry fast and medium sized memory

256kb - 2mb

Question 31

how does a digital camera work?

Answer 31

uses ccd or cmos sensor comprising millions of tiny light sensors arranged ina grid
when the shutter opens light eneter camera
each sensor measures the birghtness of each pixle
these are then later ocnverted into binary and then displayed on the screen of the digital camera

Question 32

how do RFID tags work?

Answer 32

these are small tags that release radio waves at a given frequency which can be read from up to 300m

Question 33

what is an active RFID tag

Answer 33

tags that include a battery to power the tag so that it actively transmits a signal for a reader to pick up

Question 34

what is a passive RFID tag

Answer 34

do not have a battery, rely on radio waves emitted from a reader up to a meter away to provide sufficient electromagnetic power to the card using its coiled antena

Question 35

how does a laser printer work

Answer 35

printer generates a bitmap image of the printed page and using a laser unit and mirror draws a negative , reverse image onto a negatively charged drum
the laser light causes the affected areas of the drum to lose their charge.
the drum rotates past a toner hopper to attract charged toner particles onto the areas which have not been lasered

Question 36

what is the need of secondary storage ?

Answer 36

retains its content when the conmputers power is turned off so that the user is able to store data / files on their computer

Question 37

name all of the parts of a hard disk ?

Answer 37

read / write head
track
sector
platters

Question 38

how does optical storage work

Answer 38

whilst the disk is spinning a laser is shone onto the disk. this laser is able to detect where there are flats and dips. these flats and dips are later converted into binary which then allows the computer to be able to read the data

Question 39

what is a SSD

Answer 39

a form of secondart storage that uses electrical impulses to store data