Section 5 Chapter 26 - The processor Flashcards
Components of the processor (5)
- ALU
- Control unit
- System clock
- General purpose registers
- Dedicated registers
System clock
Switches between 1 and 0 millions of times per second. Each CPU operation starts as the clock changes from 0 to 1
General purpose register
A very fast piece of memory where arithmetic and logical operations take place.
Accumulator
A general purpose register where the processor only has one
Dedicated registers (5)
- Program counter (PC)
- Current Instruction Register (CIR)
- Memory address register (MAR)
- Memory buffer register (MBR)
- Status register (SR)
Program Counter
Holds the address of the next instruction to be executed
Current Instruction Register
Holds the current instruction being executed
Memory address register
Holds the address of the memory location from which data is to be fetched or written
Memory buffer register
Used to temporarily store the data read or written from memory
Status register
Contains bits that are true depending on the result of an instruction, for instance if an overflow occurs
Factors affecting processor performance (6)
- Number of cores
- Amount and type of cache
- Clock speed
- Word length
- Address bus width
- Data bus width
Why dual core processors are not always twice as fast
The software may not be able to take advantage of both cores
Cache
A small expensive and very high speed memory located inside or near the CPU
What cache stores
When an instruction is fetched from main memory it is stored in cache in case it is needed again
The levels of memory (by speed)
Registers L1 cache L2 cache L3 cache RAM
ALU
Arithmetic Logic Unit
Performs arithmetic operations, for example adding or subtracting as well as logical operations for instance AND or XOR
CU
Control Unit
Controls and coordinates the activities of the CPU. It accepts an instruction, breaks it into sequential steps and then manages its execution
Dedicated register
A very fast piece of memory that has a specific task within the fetch-decode-execute cycle
The fetch-decode-execute cycle
1 - The address of the next instruction is copied from the PC to the MAR
2 - The instruction held at that address is copied to the MBR and the contents of the PC is incremented to hold the address of the next instruction
3 - The contents of the MBR are copied to the CIR
4 - The instruction in the CIR is decoded
5 - The instruction is executed
Why multi core processors are faster
Each processor can process a different instruction with its own fetch-execute cycle, all simultaneously
How clock speed affects the processor performance
High clock speed means more instructions can be carried out per second
How word length affects processor performance
A higher word length means that the processor can process more bits simultaneously, meaning a higher throughput of bits per second
How address bus width affects processor performance
If the address bus width is not large enough to hold all the bits necessary to address all places in memory then the address will need to be sent in two parts, which will slow down the overall speed of processing
How data bus width affects processor performance
The width of the data bus is the amount of bits that can be transferred simultaneously and thus a higher width means that more bits can be sent to or from the processor in the same amount of time