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CSA (LAB) > SA1 > Flashcards

SA1 Flashcards

1
Q

is an electronic device that accepts, processes, stores, and outputs data at
high speeds according to programmed instructions.

A

A computer

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2
Q

are the tangible parts of a computer

A

Hardware

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3
Q

are used to input instructions to the computer.

A

Input Devices

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4
Q

is used to give an output of what the computer executes.

A

An output device

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5
Q

are programs that run the computer, designed to perform a particular type of
task.

A

Software

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6
Q

is the software that makes the computer work.

A

Operating System

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7
Q

stores data and program instructions.

A

Memory

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8
Q

is a memory which can be read or changed by the user or computer.

A

RAM

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9
Q

is a memory which can be read by the computer but not altered in any way.

A

ROM

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10
Q

is a type of ROM that cannot be erased or re-written.

A

PROM

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11
Q

is a type of ROM that can be erased with exposure to UV light.

A

EPROM

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12
Q

is a type of ROM that can be erased and re-written without having to remove
the chip from the computer.

A

EEPROM

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13
Q

EEPROM chips are also called

A

Flash ROMs

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14
Q

is the part of the computer that translates commands and runs programs.

A

CPU

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15
Q

is the part of the CPU that handles all arithmetic and logical operations.

A

ALU

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16
Q

is the nerve center of a computer.

A

Control Unit

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17
Q

extracts instructions from memory and decodes and executes them.

A

Control Unit

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18
Q

contains the series of commands that create software.

A

A Programming Language

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19
Q

is a sequence of extremely simple instructions known as machine code

A

Code

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20
Q

were developed because of the difficulty of programming using
assembly languages .

A

High Level Language

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21
Q

is easier to use than machine and assembly languages because
their commands are closer to natural human language .

A

High Level Language

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22
Q

is a programming language that uses easy-to- remember commands
in place of binary patterns in order to make the task of programming easier.

A

Assembly Language

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23
Q

Once an assembly-language program is written, it is converted to a machine-language
program by another program called an

A

Assembler

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24
Q

is also known as the Stored Program Architecture

A

Von Neumann Architecture

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25
Q

is a collection of wires on which electrical signals pass between components in the
system.

A

Bus

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26
Q

is used to shuffle data between the various components in a computer system.

A

Data Bus

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27
Q

carries the actual data between the processor, the memory and the
peripherals.

A

Data Bus

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28
Q

specifies the location of data in memory.

A

Address Bus

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29
Q

is an extensive collection of signals that control how the processor
communicates with the rest of the system.

A

Control Bus

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30
Q

carries the control, timing and coordination signals to manage the various
functions across the system.

A

Control Bus

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31
Q

controls the direction of data on the data bus.

A

Read and write control lines

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32
Q

allow 16, 32, and 64 bit processors to deal with smaller chunks of data.

A

Byte enable lines

33
Q

contains the memory address of the instruction to be executed

A

Program Counter

34
Q

holds the address of the location to or from which data

are to be transferred.

A

Memory Address Register

35
Q

contains the data to be written or read out of the

addressed location.

A

Memory Data Register

36
Q

contains the instruction that is being executed.

A

Instruction Register

37
Q

handles all synchronization within a computer system

A

System Clock

38
Q

is an electrical signal on the control bus which alternates between
zero and one at a periodic rate.

A

System Clock

39
Q

is the frequency with which the system clock alternates

between zero and one.

A

System Clock frequency

40
Q

is the time it takes for the system clock to switch from zero to one
and back to zero.

A

Clock Period

41
Q

One full period is also called a

A

Clock Cycle.

42
Q

is the number of clock cycles which occur each second.

A

Clock Frequency

43
Q

is the technical term meaning one cycle per second.

A

Hertz

44
Q

is the amount of time between a memory operation request

(read or write) and the time the memory operation completes.

A

Memory Access Time

45
Q

is an extra clock cycle to give some device time to complete an
operation

A

Wait State

46
Q

is an additional circuitry which introduces

additional delays into the system.

A

The decoding and buffering logic

47
Q

are high speed memory elements that resides inside the Central
Processing Unit or CPU.

A

Registers

48
Q

are used to quickly accept, store, and transfer data and instructions that
are being used immediately by the CPU.

A

Registers

49
Q

holds the address of memory where CPU wants to read

or write data.

A

Memory Address Register

50
Q

holds the contents of data or instruction read from, or
written in memory.

A

Memory Buffer Register

51
Q

is used to store data/instruction coming from the

memory or going to the memory.

A

Memory Buffer Register

52
Q

is used to specify the address of a particular I/O device.

A

I/O Address Register

53
Q 
is used for exchanging data between the I/O module and the 
processor.
A

I/O Buffer Register

54
Q

is also known as Instruction Pointer Register.

A

Program Counter

55
Q

is used to store the address of the next instruction to be fetched
for execution

A

Program Counter

56
Q

always points or holds the address of next instruction to be
fetched

A

Program Counter

57
Q

takes instruction from the Instruction Register, decodes and
executes it by sending signals to the appropriate component of computer to carry
out the task.

A

The control unit

58
Q

is located inside the ALU, It is used during arithmetic &
logical operations of ALU.

A

Accumulator Register

59
Q

holds the initial data to be operated upon, the intermediate
results, and the final result of operation.

A

Accumulator Register

60
Q

represents a set of memory blocks

A

Stack

61
Q

is used to indicate occurrence of a certain condition during an
operation of the CPU.

A

Flag register

62
Q

is used in microcomputers to temporarily store data being

transmitted to or from a peripheral device.

A

Data Register

63
Q

is an extensive collection of one bit values which help determine the
current state of the processor

A

Flag Register

64
Q

reflects the result of the previous operation involving the ALU

A

A Conditional Flags

65
Q

controls the execution of special functions.

A

A Control Flag

66
Q 
Sign Flag (SF), Zero Flag (ZF), Parity Flag (PF), Carry Flag(CF), Overflow Flag 
(OF)
A

Conditional Flags

67
Q

Direction Flag (DF) , Interrupt Enable Flag (IF) , Trap Flag (TF)

A

Control Flags

68
Q

transfers the contents of a specific MM location to the CPU. The word in the
MM remains unchanged.

A

Fetch

69
Q

transfers the contents of a specific MM location to the CPU. The word in the
MM remains unchanged.

A

Read

70
Q

transfers a word of information from the CPU to a specific MM location. This
overwrites the former contents of that location.

A

Store

71
Q

transfers a word of information from the CPU to a specific MM location. This
overwrites the former contents of that location

A

Write

72
Q

A word consumes X consecutive memory addresses.

A

two

73
Q

The address for the double word is the

A

address of its low-order byte.

74
Q

accesses a word and a double word by storing the low-order byte
of a word at the address specified and the high-order byte at TH the next location.

A

The 80x86 family

75
Q

The 8086, 80186, 80286, and 80386sx processors have a

A

16 bit data bus.

76
Q

Accessing words at odd addresses on a 16 bit processor is X than accessing
words at even addresses.

A

slower

77
Q

The 8088 and 80188 microprocessors have an X bit data bus.

A

eight

78
Q

Accessing 32 bit quantities always takes at least Xmemory operations on the
16 bit processors.

A

2

79
Q

If you access a 32 bit quantity at an odd address, the processor will require X
memory operations to access the data

A

three

CSA (LAB) (5 decks)

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