SA1 Flashcards

1
Q

is an electronic device that accepts, processes, stores, and outputs data at
high speeds according to programmed instructions.

A

A computer

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2
Q

are the tangible parts of a computer

A

Hardware

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3
Q

are used to input instructions to the computer.

A

Input Devices

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4
Q

is used to give an output of what the computer executes.

A

An output device

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5
Q

are programs that run the computer, designed to perform a particular type of
task.

A

Software

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6
Q

is the software that makes the computer work.

A

Operating System

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7
Q

stores data and program instructions.

A

Memory

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8
Q

is a memory which can be read or changed by the user or computer.

A

RAM

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9
Q

is a memory which can be read by the computer but not altered in any way.

A

ROM

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10
Q

is a type of ROM that cannot be erased or re-written.

A

PROM

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11
Q

is a type of ROM that can be erased with exposure to UV light.

A

EPROM

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12
Q

is a type of ROM that can be erased and re-written without having to remove
the chip from the computer.

A

EEPROM

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13
Q

EEPROM chips are also called

A

Flash ROMs

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14
Q

is the part of the computer that translates commands and runs programs.

A

CPU

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15
Q

is the part of the CPU that handles all arithmetic and logical operations.

A

ALU

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16
Q

is the nerve center of a computer.

A

Control Unit

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17
Q

extracts instructions from memory and decodes and executes them.

A

Control Unit

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18
Q

contains the series of commands that create software.

A

A Programming Language

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19
Q

is a sequence of extremely simple instructions known as machine code

A

Code

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20
Q

were developed because of the difficulty of programming using
assembly languages .

A

High Level Language

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21
Q

is easier to use than machine and assembly languages because
their commands are closer to natural human language .

A

High Level Language

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22
Q

is a programming language that uses easy-to- remember commands
in place of binary patterns in order to make the task of programming easier.

A

Assembly Language

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23
Q

Once an assembly-language program is written, it is converted to a machine-language
program by another program called an

A

Assembler

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24
Q

is also known as the Stored Program Architecture

A

Von Neumann Architecture

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25
is a collection of wires on which electrical signals pass between components in the system.
Bus
26
is used to shuffle data between the various components in a computer system.
Data Bus
27
carries the actual data between the processor, the memory and the peripherals.
Data Bus
28
specifies the location of data in memory.
Address Bus
29
is an extensive collection of signals that control how the processor communicates with the rest of the system.
Control Bus
30
carries the control, timing and coordination signals to manage the various functions across the system.
Control Bus
31
controls the direction of data on the data bus.
Read and write control lines
32
allow 16, 32, and 64 bit processors to deal with smaller chunks of data.
Byte enable lines
33
contains the memory address of the instruction to be executed
Program Counter
34
holds the address of the location to or from which data | are to be transferred.
Memory Address Register
35
contains the data to be written or read out of the | addressed location.
Memory Data Register
36
contains the instruction that is being executed.
Instruction Register
37
handles all synchronization within a computer system
System Clock
38
is an electrical signal on the control bus which alternates between zero and one at a periodic rate.
System Clock
39
is the frequency with which the system clock alternates | between zero and one.
System Clock frequency
40
is the time it takes for the system clock to switch from zero to one and back to zero.
Clock Period
41
One full period is also called a
Clock Cycle.
42
is the number of clock cycles which occur each second.
Clock Frequency
43
is the technical term meaning one cycle per second.
Hertz
44
is the amount of time between a memory operation request | (read or write) and the time the memory operation completes.
Memory Access Time
45
is an extra clock cycle to give some device time to complete an operation
Wait State
46
is an additional circuitry which introduces | additional delays into the system.
The decoding and buffering logic
47
are high speed memory elements that resides inside the Central Processing Unit or CPU.
Registers
48
are used to quickly accept, store, and transfer data and instructions that are being used immediately by the CPU.
Registers
49
holds the address of memory where CPU wants to read | or write data.
Memory Address Register
50
holds the contents of data or instruction read from, or written in memory.
Memory Buffer Register
51
is used to store data/instruction coming from the | memory or going to the memory.
Memory Buffer Register
52
is used to specify the address of a particular I/O device.
I/O Address Register
53
``` is used for exchanging data between the I/O module and the processor. ```
I/O Buffer Register
54
is also known as Instruction Pointer Register.
Program Counter
55
is used to store the address of the next instruction to be fetched for execution
Program Counter
56
always points or holds the address of next instruction to be fetched
Program Counter
57
takes instruction from the Instruction Register, decodes and executes it by sending signals to the appropriate component of computer to carry out the task.
The control unit
58
is located inside the ALU, It is used during arithmetic & logical operations of ALU.
Accumulator Register
59
holds the initial data to be operated upon, the intermediate results, and the final result of operation.
Accumulator Register
60
represents a set of memory blocks
Stack
61
is used to indicate occurrence of a certain condition during an operation of the CPU.
Flag register
62
is used in microcomputers to temporarily store data being | transmitted to or from a peripheral device.
Data Register
63
is an extensive collection of one bit values which help determine the current state of the processor
Flag Register
64
reflects the result of the previous operation involving the ALU
A Conditional Flags
65
controls the execution of special functions.
A Control Flag
66
``` Sign Flag (SF), Zero Flag (ZF), Parity Flag (PF), Carry Flag(CF), Overflow Flag (OF) ```
Conditional Flags
67
Direction Flag (DF) , Interrupt Enable Flag (IF) , Trap Flag (TF)
Control Flags
68
transfers the contents of a specific MM location to the CPU. The word in the MM remains unchanged.
Fetch
69
transfers the contents of a specific MM location to the CPU. The word in the MM remains unchanged.
Read
70
transfers a word of information from the CPU to a specific MM location. This overwrites the former contents of that location.
Store
71
transfers a word of information from the CPU to a specific MM location. This overwrites the former contents of that location
Write
72
A word consumes X consecutive memory addresses.
two
73
The address for the double word is the
address of its low-order byte.
74
accesses a word and a double word by storing the low-order byte of a word at the address specified and the high-order byte at TH the next location.
The 80x86 family
75
The 8086, 80186, 80286, and 80386sx processors have a
16 bit data bus.
76
Accessing words at odd addresses on a 16 bit processor is X than accessing words at even addresses.
slower
77
The 8088 and 80188 microprocessors have an X bit data bus.
eight
78
Accessing 32 bit quantities always takes at least Xmemory operations on the 16 bit processors.
2
79
If you access a 32 bit quantity at an odd address, the processor will require X memory operations to access the data
three