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Entrepreneurship > Platform Technologies > Flashcards

Platform Technologies Flashcards

1
Q

Component are the parts you can touch.

A

Computer Hardware

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2
Q

The smallest hardware that can still perform computation is the ________

A

Computer chip

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3
Q

is composed of semi-conductors and tiny wires laid out on top of thin wafers of silicon

A

Computer chip

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4
Q

is always required to execute any command or instruction

A

Software

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5
Q

can be configured to represent either a 0 or a 1 when electrical is supplied to them

A

semi-conductor

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6
Q

Sometimes referred to as machine code or object code, ____________ ____________ is a collection or binary digits or bits that computer reads and interprets.____________ is the only language of computer is capable to understand.

A

Machine Language

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7
Q

Limitations of machine language

A
  1. Machine dependent.
  2. Difficult to program.
  3. High error level when we write a program in this language.
  4. Difficult to modify the code
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8
Q

A ____________ can understand positional number system only where there are a few symbols
called digits and these symbols represent different values depending on the position they occupy in the
number

A

digital system

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9
Q

A value of each digit in a number can be determined using

A

The digit
● The position of the digit in the number
● The base of the number system (where base is defined as the total number of digits available in
the number system).

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10
Q

are command or programs written in machine code of a machine(computer) that it can recognize and execute

A

Machine instruction

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11
Q

Different instruction cycles :

A

Memory address registers(MAR)
Memory buffers registers(MBR)
Programs Counter(PC)
Instruction register(IR)

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12
Q

: It is connected to the address lines of the system bus. It specifies the
address in memory for a read or write operation.

A

Memory address registers (MAR)

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13
Q

t is connected to the data lines of the system bus. It contains the value to be
stored in memory or the last value read from the memory

A

Memory Buffer Register(MBR)

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14
Q

Holds the address of the next instruction to be fetched.

A

Program Counter (PC):

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15
Q

Holds the last instruction fetched

A

Instruction Register (IR):

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16
Q

Each phase of ___________ ______ can be decomposed into a sequence of elementary micro-operations. In the
above examples, there is one sequence each for the Fetch, Indirect, Execute and Interrupt Cycles.

A

Instruction Cycle

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17
Q

The ______________ is always followed by the Execute Cycle.

A

Indirect Cycle

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18
Q

The ___________ ______ is always followed by
the Fetch Cycle.

A

Interrupt Cycle

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19
Q

For both _______ ___ _______ _______ the next cycle depends on the state of the system.

A

fetch and execute cycles,

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20
Q

We assumed a
new 2-bit register called ______ ______ ________The _ _ _ designates the state of processor in terms of which
portion of the cycle it is in:

A

Instruction Cycle Code (ICC).

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21
Q

Von Neumann architecture’s?

A

Fixed Program Computers
Stored Program Computers

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22
Q

These can be programmed to carry out many different tasks,
applications are stored on them, hence the name

A

Stored Program Computers

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23
Q

Their function is very specific and they couldn’t be programmed, e.g.
Calculators

A

Fixed Program Computers –

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24
Q

It is also known as IAS computer and is having three basic units

A
  1. The Central Processing Unit (CPU)
  2. The Main Memory Unit
  3. The Input/output Device
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25
Q

A control unit (CU) handles all processor control signals. It directs all input and output flow, fetches code for
instructions and controlling how data moves around the system.

A

Control Unit –

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26
Q

The arithmetic logic unit is the part of the CPU that handles all the calculations the CPU may need, e.g.
Addition, Subtraction, Comparisons. It performs Logical Operations, Bit Shifting Operations, and Arithmetic
Operation.

A

Arithmetic and Logic Unit (ALU)

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27
Q

Main Memory Unit (Registers)

A
  1. Accumulator
  2. Program Counter (PC):
  3. Memory Address Register (MAR):
  4. Memory Data Register (MDR):
  5. Current Instruction Register (CIR)
  6. Instruction Buffer Register (IBR):
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28
Q

Program or data is read into main memory from the input device or secondary
storage under the control of CPU input instruction. Output devices are used to output the information from a
computer. If some results are evaluated by computer and it is stored in the computer, then with the help of
output devices, we can present it to the user

A

Input/Output Devices

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29
Q

Data is transmitted from one part of a computer to another, connecting all major internal
components to the CPU and memory, by the means of Buses

A

Buses

30
Q

Type’s of buses

A
  1. Data buss
  2. Address buss
  3. Control buss
31
Q

It carries data among the memory unit, the I/O devices, and the processor.

A

Data buss

32
Q

It carries the address of data (not the actual data) between memory and processor.

A

Address buss

33
Q

: It carries control commands from the CPU (and status signals from other devices) in order
to control and coordinate all the activities within the computer.

A

Control buss

34
Q

Whatever we do to enhance performance, we cannot get away from
the fact that instructions can only be done one at a time and can only be carried out sequentially.
Both of these factors hold back the competence of the CPU.

A

Von neumann bottleneck

35
Q

where machine language (binary digits) is the only format understood by the CPU.

A

Von Neumann Architecture

36
Q

TYPES OF CPU ARCHITECTURE

A

1.CISC (Complex Instruction Set Computer)
2.RISC (Reduced Instruction Set Computer)

37
Q

1Architecture with complex instructions, which can perform multiple operations in a single instruction.

A

.CISC (Complex Instruction Set Computer)

38
Q

Architecture with simpler instructions in one clock cycle.
Architecture with more general-purpose registers and easier pipelining.

A

2.RISC (Reduced Instruction Set Computer)

39
Q

COMPONENTS OF A CPU

A

Arithmetic Logic Unit (ALU)
Control Unit (CU)
Registers

40
Q

is responsible for performing arithmetic (addition, subtraction) and logical operations (AND, OR, NOT).

A

Arithmetic Logic Unit (ALU)

41
Q

manages the CPU’s operations, including controlling data flow between the CPU and other parts of the computer.

A

Control Unit (CU)

42
Q

hold data temporarily during processing for quick access. Important registers include

A

Registers

43
Q

Important registers include:

A

Program Counter (PC):
Instruction Register (IR):
Accumulator:

44
Q

 holds the address of the next instruction to be executed.

A

Program Counter

45
Q

Holds the current instruction being executed.

A

Instruction Register (IR)

46
Q

Stores intermediate results of calculations.

A

Accumulator

47
Q

holds frequently accessed data and instructions, allowing faster processing compared to other types of memory
is the fastest type of memory in the hierarchy.

A

Cache

48
Q

is responsible for carrying data and instructions between components.

A

Bus

49
Q

Types of buses:

A

Address bus
Control bus
Data bus

50
Q

carries memory addresses.

A

Address Bus

51
Q

Transfers actual data between the components of the computer.

A

Data bus

52
Q

Carries control signals.

A

Control Bus:

53
Q

Main Functions of an Operating System (OS):

A

Resource Management
Process Management
Memory Management:
File Management:
I/O Management:

54
Q

Manages CPU, memory, and storage allocation.

A

Resource Management

55
Q

Creates, schedules, and terminates processes.

A

Process Management

56
Q

 Allocates and protects memory spaces.

A

Memory Management

57
Q

Organizes files and directories.

A

File Management:

58
Q

Controls communication between peripherals.

A

I/O Management

59
Q

Types of Virtualization:

A

Operating System Virtualization
Hardware Virtualization
Containerization

60
Q

Allows multiple operating systems on one physical machine.

A

Operating System Virtualization

61
Q

Simulates hardware to create virtual machines (VMs).

A

Hardware Virtualization:

62
Q

 Isolates applications in containers, sharing the same OS kernel.

A

Containerization:

63
Q

 is the process by which a computer retrieves, interprets, and executes instructions.

A

fetch-decode-execute cycle

64
Q

retrieves the next instruction from memory.

A

Fetch: The Control Unit (CU)

65
Q

The CU decodes the instruction to understand what operation needs to be performed.

A

Decode:

66
Q

performs the required operation (e.g., arithmetic or logic).

A

Execute: The Arithmetic Logic Unit (ALU)

67
Q

Increasing cache memory or implementing pipelining can speed up instruction execution.

A

Improvement Suggestion:

68
Q

_______ uses complex instructions, while _______ uses simpler instructions that execute in one clock cycle.

A

RISC
CISC

69
Q

is better for simple tasks (word processing, web browsing) because it requires fewer resources and can process instructions more quickly, making it more efficient for basic operations.

A

RISC

70
Q

allow multiple operating systems to run on one physical computer by creating isolated environments for each.

A

Virtual Machines (VMs)

71
Q

manages the VMs, ensuring they remain separate.

A

hypervisor

72
Q
A

Entrepreneurship (4 decks)

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