Miscellaneous Flashcards
Compare RISC (7) and CISC (7)
RISC:
- Reduced instruction set computer
- Fixed length instruction
- Very simple instructions (compilers, HLL)
- Load/store architectures
- More registers - instructions operate either on registers or memory, not both
- Less complex to implement in hardware, leaving more room for registers
- instructions completes in one single cycle
CISC:
- Complex instruction set computer
- Variable length instruction (Memory restrictions)
- Instructions can operate directly on data in memory (few registers)
- More complex instructions - each single instruction handle more complicated operations (Goal of architecture is to complete a task in fewest lines of assembly as possible)
- Instructions closely resembles operations in HLL
- Emphasis on building complex instructions in hardware
- multi-cycle completion
Arithmetic instructions in CISC can have their operands in memory, whereas arithmetic
instructions in RISC must have their operands in registers.
What is the formula for execution time?
instruction count * CPI * cycle time
What is the formula for Avarage memory access time (AMAT)?
(hit-rate * hit-time) + (miss-rate * miss-latency)
Compare exceptions, interrupts and traps
All of them make CPU jump out of normal execution
Interrupts:
- Caused by external device (e.g. I/O)
- Interrupt handler defining how CPU will act on interrupt
- prioritized
Exceptions:
- Caused by program execution (errors, wrongful execution)
- Handled the same as interrupts
- prioritized
Traps:
- Software generated
- Syscalls
What is dual-mode operation in an OS?
Dual-mode operation allows the kernel to access memory of user processes, but prevents user
processes from accessing memory of the kernel.
Give examples of program state that is stored on a context switch
Operating system must maintain a process’s Program Counter, Stack Pointer, and Register values when
the process is not running.
Which of the following is defined by Instruction Set Architecture (ISA)?
Register width (i.e. number of bits in a register)
Number of pipeline stages
Number of sets in the cache
The cache miss latency
the register width
You have a simple microcontroller, and all of its pins have been used to connect to the power
supply and other external components. Your code running inside the microcontroller does not
work as expected. Which of the following mechanisms can be used to debug the issue?
Run it in a simulator
Describe the difference between cooperative scheduling and preemptive scheduling.
What is cooperative scheduling?
State advantages and disadvantages of cooperative scheduling and preemptive scheduling.
Describe the process of memory mapping a file or device I/O into a process’ virtual address
space in Linux systems.
When can you use a stub debugger?
When you have a spare serial port.
Requires a few kB of flash memory
Needs to hook into some interrupts
Need a few pins available to access to UART and SPI for communication
A stub debugger is a small piece of code that can be installed on the device
When can you use simulators for debugging?
Does not need any hardware
When can you use JTAG for debugging?
Standard protocol for debugging a chip using only a few wires. These pins are often separate from the normal I/O pins.
What is the sub-threshold leakage current?
Th electrons that flow between drain and source, even when there are no channel between them in the transistors.
What is gate-leakage?
Current that flows between gate and body, even though there is an insulator underneath the gate.
Junction leakage
Current that goes from drain to body
What is the formula for static power?
P_statis = Vdd * I_static
Vdd: Supplied voltage
I_static: The value of the sum of all leakage currents
Leakage currents: Sub-threshold leakage, gate-leakage and junction leakage
What are the hardware techniques to reduce power consumption?
Clock gating
Power gating
What are the software techniques to reduce power consumption?
Sleep modes
DVFS
What is clock gating?
Sets frequency to 0 for circuits not in use using an enable signal through an AND gate.
Digital circuits change state on falling/rising-edge of clock
What is power gating?
Turn off power supply to circuit not in use. Removes static- and dynamic power supply.
Turn off using a sleep signal.
What are sleep modes?
Power modes controlled by the OS. The OS can put a system into sleep modes.
Very similar to power gating in hardware, just in software.
There are multiple levels of sleep modes that have various level of trade offs between overhead and power savings.