Lecture 4 - Caches and virtual memory Flashcards
What are three types of cache organization
Direct mapped
Fully associative
n-Way set assosiative
What is a direct mapped cache?
A block can be placed only by one location in the cache
What is a fully associated cache?
A block can be placed anywhere in the cache
What is a n-way set associative cache?
A block can be placed at one of n locations in the cache
Compare how cache lines are accessed in the different types of caches
In direct mapped caches, the block is directly gone to. If the data is not there, the address has not be stored in cache
In fully associative caches, the whole cache must be looked through to know if an address is stored in cache.
In set-associative caches, n cache lines must be looked through to know if an address has been stored to cache.
What is a problem with direct mapped caches?
Can cause a lot of cache misses, when addresses accessed all translates to the same cache line. This causes one cache line to be switched out on every access, though the rest of the cache is empty.
How are bits used in fully associative caches?
tag + byte offset
As addresses can be stored anywhere, no bits are used to find cache clock.
Index bit from direct mapped becomes part of tag in fully associative.
What are some problems with fully associative caches?
Because an address can be mapped anywhere, searching for a matching tag can be anywhere.
How are n-way set associative caches organized?
Bundle multiple blocks together into sets containing n blocks.
index bits maps to a set
Within the set, do tag-comparison to see if address is stored in cache.
What is a cache set
A group of blocks/lines
What is a cache way?
Number of blocks in a set
When does a n-way become fully associative
When the number of blocks in a set (n) is the same amount as blocks in the cache. Set = 1
When does a n-way become directly mapped?
Number of blocks equals the number of sets
What is cache replacement
Replacing one cache block with a new clock from memory
Name some replacement polisies?
LRU (Least recently used)
FIFO (First-in-first-out)
Describe the LRU replacement policy
Evict the cache vlock that hasn’t been accessed in the longest.
Relies the past behaviour to predict the future
Complex to implement
Describe the FIFO replacement policy
Need to remember the order of which the blocks were stored into the cache.
Simpler to implement
Not the best for performance. As a block that was introduced early, might be used very frequently. When the cache is full, this might therefor be evicted although it is used a lot.
What are the two ways of writing modified data to memory?
Write-back
Write-through
What is write-back?
Write the modified data to memory when the block is evicted from cache.
What is write-through?
Write the modified data to memory while writing to cache.
What are the advantages and disadvantages with using write-backs
Pro: If the same cache line is written to multiple times - this inly needs to be written to memory once, saving energy and bandwith.
Con: need to track which bytes has been written to, content of memory and cache is not the same. Need a dirty bit for each block
What are the advantages and disadvantages with using write-throughs
Pro: simpler implementation and coherence.
Con: slow (write back is as slow as writing to memory, because execution won’t finish until memory-write is done), bandwith intensive
How do measure cache performance?
AMAT (avarage memory access time)
AMAT = (hit rate * hit-time) + (miss rate * miss-latency)
Why do we use multiple levels of caches instead of one big cache?
Large caches has larger hit-latencies. Hit hit-rate is high, reducing hit-latency increases performance.
Want to balance capacity and access latency.
Also, if a miss happens with multiple caches, the data can be fetched from a lower level cache instead of the memory directly.
