Lesson 9 : Network Components Part 2 Flashcards
which controls the flow of information in a multipoint data link system.
Line Control Unit (LCU or LinCo )
the primary station, the LCU is often called a _______ because it processes information and serves as an interface between the host computer and all the data communications circuits it serves.
Front-End Processor
directs the flow of input and output data between data communications circuits and their respective application programs.
FEP
inserted and deleted in the FEP and LCUs
Data-Link Control Character
A single special purpose integrated circuit performs many of the fundamental data communications functions and is designed for asynchronous data transmission
Universal Asynchronous Receiver/Transmitter (UART)
A single special purpose integrated circuit performs many of the fundamental data communications functions and is designed for synchronous data transmission
Universal Synchronous Receiver/Transmitter (USRT)
A single special purpose integrated circuit performs many of the fundamental data communications functions and is designed for asynchronous or synchronous data transmission
Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
DIP
Dual in-line Package
USARTs are available in __- to __-pin dual in-line packages
24 to 64
DTE
Data Terminal Equipment
DCE
Data Communications Equipment
Special purpose UART chip manufactured by Motorola
Asynchronous Communications Interface Adapter (ACIA)
allows UART to operate virtually independently of one another
Bidirectional Data Bus
coordinates data transfer between
the line-control unit and the modem
CPU
responsible for programming the UARTβs
control register, reading the status register,
transferring parallel data to and from the
UART transmit and receive buffer register
CPU
specifies the number of data bits per character
Control Word
only bit in the UART that is not
optional or programmable.
Start Bit
an n-bit data register that
keeps track of the status of the UARTs
transmit and receive buffer registers
Word Register
transmit shift register has been completed
transmission of a data character
Transmit Buffer Empty (TBMT)
set when a received character has a parity error in it
Receive Parity Error (RPE)
set when a character is received without any or with an improper number of stop bits
Receive Framing Error (RFE)
set when a character in the receive buffer register is written over by another receive character because the CPU failed to service an active condition on REA before the next character was received from the receive shift register.
Receiver Overrun (ROR)
data character has been received and loaded into the receive data register.
Receive Data Available (RDA)
CRS
Control-Register Strobe
internal to the UART, tells the transmit buffer register when the transmit shift register is empty and available
Transmit End-Of-Character (TEOC)
Signal
where data picks up the appropriate start, stop, and parity bits.
Steering Logic Circuit
TSO
Transmit Serial Output
TCP
Transmit Clock
set when the character is transferred in parallel into the receive buffer register
Receive Data Available (RDA) Flag
RDE
Receive Data Enable
detect valid start bits, which indicate the beginning of a data character
Start-bit Verification Circuit
can be sometimes interpreted as start bit
Noise Hit
difference in time between the beginning of a start bit and when it is detected
Detection Error
equal to the time of one receive clock cycle (π‘ππ = 1/π ππΏ )
Maximum Detection Error
helps reduce clock slippage
Stop Bits
Other term for clock slippage
clock skew
used for synchronous transmission of data
between a DTE and a DCE.
USRT
coordinates the flow of data, control signals, and timing information between the DTE and the DCE
Serial Interface
What year did the Electronics Industries Association (EIA) created RS-232 specifications
1962
created to standardize interface equipment between data terminal equipment and data communications equipment
RS-232 specification
What does RS in RS-232 mean?
Recommended Standard
its specification identify the mechanical,
electrical, functional, and procedural description for the interface between DTEs
and DCEs.
RS-232 specification
Official name of RS-232
Interface Between Data Terminal Equipment and Data Communications Equipment Employing Serial Binary Data Interchange
sometimes referred to as the EIA-232 standard
RS-232D
Specifies a cable with two connectors
Mechanical Specification
used for transporting asynchronous data between DTE and a DCE when the DCE is
connected directly to a standard two-wire
telephone line attached to the public
switched telephone network
EIA β 561 Modular Connector
convert the internal voltage level from the DTE and DCE to RS-232 values
Voltage-leveling Circuits
called to a voltage leveler if it outputs signals onto the cable and a terminator if it accepts signals from the cable.
Driver
difference in the voltage levels between the driver output and the terminator input
Noise Margin
reduces susceptibility to interface caused
by noise transients induced into the cable
Noise Margin
the minimum noise margin of 2V.
Implied Noise Margin
noise margin of the circuit is a high value
High Noise Immunity
noise margin is a low value
Low Noise Immunity
signals propagate in both directions
Bidirectional
