I/O Flashcards
I/O devices can be split into two categories. What are they?
Block devices
Character devices
A block devise is one that [s] information in [fsb], each one with its own [a]. The essential property of a block device is that it is possible to [r] or [w] each block [i] of all the other ones. [d] are the most common block devices
saves fixed size bits address read write indepently disks
A character device [d] or [a] a [s] of [c], without regard to any [b] structure. It is not [a] and does not have any [s] operation.
delivers accesses stream characters block addressable seek
Give three examples of character device I/O
printers
network intefaces
mice
I/O units typically consist of an [x] component and a [x] compnent.
mechanical
electronic
the electronic component is called the [d] or [a]
device controller
adapter
electronic controllers can handle [m] devices
many
The electronic controller must [a] serial [b] stream to [b] of [b], perform [ec] and [c] with the [c]
convert bit block bytes error correction communicate cpu
electronic controllers typically have a number of [r] where the [o] can command the device to [d] or [a] data or switch itself [ooo].
registers operating system deliver access on or off
The CPU needs to be [a] the device [c] to exchange [d] with them
address
controllers
data
An operating system can only use a [d] if the hardware has a [d] [c]
DMA (direct memory access)
DMA controller
The [d] has [a] to the [s] bus [i] of the CPI.
DMA
access
system
indepent
A DMA has several registers, including a [m], [b] and one or more [c]
memory address regsiter
bute count register
control registers
DMA [c] registers specify the [i] to use, the [d] of transfer, the transfer [u] and the [n] of [b] to transfer in one burst
controller i/o direction unit number bytes
DMA can [c] the flow of [b] between memory and some controller without [c] [c] intervention. The CPU sets up the DMA, telling it how many [b] to [t], the [d] and [ma] involved, and the [d] and let’s it go. When the DMA is [d], it causes an [i], which is handled.
control bytes constant CPU transfer direction memory address direction interrupt
The steps for the DMA.
The [c] programs the [d]
The DMA [c] initates the [t] by issuing a [r] request over the [b] to the [d] controller.
A [w] to [m] occurs
When the write is complete, the [d][c] sends an [as] to the [d][c] over the bus.
DMA controller then [i] the [m] to use and [d] the [b][c]
DMA then [i] the CPU to let it know that the transfer is complete.
When the operating system starts up, it does not have to copy the [db] to [m] because it is already there.
CPU DMA controller transfer read bus disk write memory device controller acknowledgement signal disk controller / DMA controller? increments memory address decrements byte counter interrupts disk block memory
When an [i] device has finished the work given to it, it [c] an [i]. It does this by [a] a [s] on the [b] that it has been [a]. The [s] is detected by the [icc] which decides what to do. If no other [i] are [p], the [ic] processes the interrupt immediately. If another one is in progress, the device is [i] and continues to [a] an [is] on the [b] until is [s] by the CPU.
I/O causes interrupt asserting signal bus assigned signal interrupt controller chip interrupts pending interrupt controller ignored assert interrupt signal bus serviced
to handle an intterupt, an [ic] puts a [n] on the [al] specifying which [d] wants attention and [a] a signal that [i] the CPU
interrupt controller number address lines device asserts interrutps
shortly after it starts running, the [isp] acknowledges the [i] by [w] a [v] to one of the [ic] ports. This means that [ic] is free to make [f] [i]
interrupt service procedure interrupt writing value interrupt controller's further interrupts
Define device indepdence
it should be possible to write programs that can access any I/O device without
Define uniform naming in relation to I/O
That the name of a file shouldn’t depend on the device.
Define error handling in relation to I/O
The device should handles errors (if it can). Many errors are transient, such as read errors (caused by dust) so can often be overcome by repeating the action.
Define progammed I/O
Process(or) is busy-waiting for the operation to complete
The essential aspect of programmed I/O is that the CPU continously [p] the device to see if it is [r] to accept more work. This behaviour is often called [p] or [b]
polls
ready
polling
busy waiting
Programmed I/O is [s] but has the disadvantage of tying up [c] time until [a] the [i] is done.
simple
CPU
all
I/O
Define interrupt driven I/O
Idea is that the CPU is able to get on with some other work.
Think of a printer. Printed character, interrupts.
One [d] of interrupt-driven I/O is that an [i] occurs on every [c]. Interrupts take [t]. However, if you use a [d], you can let the [d] [c] feed to the [c] to the printer without needing the [c]. The [a] of using the [d] is that printer [i] become about a [b] interrupt rather than [c] led.
disadvantages interrupt character time DIMA DMA controller characters CPU advantage DMA interrupts buffers character
The four layers of I/O software are [ul] I/O software [di] [oss] [dd] [ih]
user level
device independent operating system software
device drivers
interrupt handlers
The steps for an interrupt
- Save any [r] (including the [p]) that have not already been saved.
- Set up a [c] for the [isp].
- Set up a [s] for the [isp].
- [a] the [ic].
- [c] the [r] from where theey were [s] to the [pt].
- run the [isp].
- choose which [p] to run next.
- set up the [m] for the next [p] to run.
- load the new [p][r], including its [p]
- starting [r] the new [p]
register program status word context interrupt service procedure stack interrupt service procedure acknowledge interrupt controller copy registers saved process table interrupt service procedure process mmu process process registers program status word running process
Device driver [c] is [ds] code for [c] a piece of [i]
code
device specific
controlling
i/o
device drivers are [e] to [r] in the [k]
expected
run
kernel
most [o] define a [si] that all [bd] must support and a second [si] that all [cd] must support.
operating systems standard interface block device standard interface character device
A devcice driver [a][a][r] and [w] rquests from the device indepedent [s] above it. The [d] must also [i] the [d]. It may also need to control the [p] and [l] events
accepts abstract read write software drive initiate device power log
A device driver [c] the [i][p]. If they are not [v], an [e] is [r]. If they are [v], a [t] from [a] to [c] terms may be needed. If the device is [i], the [s] of the [h] will be checked to see if it can be started. You may also need to [s] the device on, or start a [m] before [t] can begin. Once the [d] is ready, the [ac] can begin.
controls input parameters valid error returned valid transfer abstract concrete idle state hardware switch motor transfer device actual control
What is seek time?
The time it takes to position disk head over right track
What is rotational delay?
Time it takes for the beginning of the sector to reach head
What is access time?
Sum of seek and rotational delay
When a user program tires to [r] a [b] from a file, the operating system carries out the call. The [di] software looks for it in the [bc]. If the [b] is not there, it calls the [dd] to issue the request to the hardware to go get it from the [d] The process then [b] until the disk operation completes. When the disk is finished, the hardware generates an [i]. [IH] runs. It then extracts [s] from device and [w] up the sleeping [p] to finish off.
read block device independent buffer cache device driver disk blocks interrupt interrupt handler status wakes process
What is first in first out for disk scheduling?
Process request sequentially
Fair to all processes
What is Shortest Service/Seek Time First for disk scheduling?
Select the disk I/O request that requires the least movement of the disk arm from its current position
Requires knowledge of times of all requests, though.
What is elevator scheduling for disks?
Arm moves in one direction and then reverses.
What does RAID stand for?
Redundant Array of Independent Disks
RAID is?
set of physical, distinct disks that the operating system views as a whole
What is stored on redundant disks?
Parity bits for error correction
What is striping
Distributing data over multiple drives
If software issues a [c] to read a data block consisting of four consecutive [s], the [rc] will break this command up into four commands. I/O in [p] without the software knowing it.
command
strips
raid controller
parallel
RAID level 1 is [t] RAID
True
RAID level one [d] disks so there are as many [p
disks as there are [b] disks
duplicates
primary
backup
RAID level 2 and RAID level 3 do what?
distribute bits
What are the policies for clearing the disk cache?
Least recently used
Least frequently used
Least Recently Used:
Recently [r] or recently [a] [b] is moved to [t] of [s]
[b] on [b] is [r]
A stack of [p] is used to keep track.
referenced added block top stack pointers
Least Frequently Used:
[c] associated with block.
[l] counter is replaced.
counter
lowest
